Examples and register assignments
4.3 Registers
SIMATIC PCIe DIO4
28
Compact Operating Instructions, 11/2011, A5E03493449-01
Bit
Access Name
Default Description
5
RWC
CEIF
0
Interrupt flag for comparison result "equal to". If "1", an
interrupt is triggered with the comparison result "equal
to": CxVR/CxCAPR == CxCOMR. If the bit is written with
"1", the bit is reset.
4..3
RO
0
Reserved
2
RWC
OIF
0
Interrupt flag for counter overflow. If "1", an interrupt is
triggered with a counter overflow. If the bit is written with
"1", the bit is reset.
1
RO
IF
0
Interrupt flag for counter. If OIF, CEIF, CGIF or CSIF
were enabled and are active, the flag is set.
0
RO
0
Reserved
CxVR: Counter x Value Register (BASE + (x*0x100))
Bit
Access Name
Default Description
35..0
RO
0
Current counter value
CxTR0: Counter x Trigger Register (BASE + (x*0x100))
If the trigger is active, the counter is incremented.
Bit
Access Name
Default Description
31..24 RO
0
Reserved
23..16 RW
PRE
0
Trigger pre-divider. Number of events until trigger is
enabled.
15..14 RO
0
Reserved
13..8
RW
SSEL
0
Selection of trigger source, see "Output sources".
7
RW
PEN
0
Pre-divider enabled. If "1", the trigger is pre-divided by
the value of PRE.
6
RO
0
Reserved
5..4
RW
OMODE
0
Selection of trigger output mode:
00: Normal
01: Changing (1→0, 0→1)
3..1
RW
DMODE
0
Selection of trigger detect mode:
000: High level
001: Low level
100: Rising edge only
101: Falling edge only
110: Rising and falling edge
0
RO
TS
0
Trigger status. If "1", trigger is enabled.
