Siemens SIMATIC IM 151/CPU, Manual

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Instruction List
B-26
ET 200S Interface Module IM 151/CPU
A5E00058783-01
B.13 Setting/Resetting Bit Addresses
Assignment of the value ”1” or ”0” or the RLO to the addressed instruction. The
instructions can be dependent on the MCR.
In-
stru-
Address
Description
Length
in
Typical Execution Time in
s
ction
Address
ID
Description
Words
Direct Ad-
dressing
Indirect Ad-
dressing
*
S I/O
M
L
DBX/DIX
Set input/output to ”1”
(MCR-dependent)
Set memory marker to ”1”
(MCR-dependent)
Set local data bit to ”1”
(MCR-dependent)
Set data bit to ”1”
(MCR-dependent)
1**/2
1**/2
2
2
0.3
0.5
0.8
2.3
1.3
2.9
3.7
4.3 2.2+
2.9+
2.5+
3.0+
2.5+
2.5+
3.5+
4.1+
[AR1,m]
[AR2,m]
Parame-
ters Set I/Q/M/L/DBX/DIX (MCR-dependent) to
” 1”. (addressed (area-crossing) via
AR1/AR2 or via parameter) 2 –
–
– +
+
+
R I/O
M
L
DBX/DIX
Reset input/output to ”0”
(MCR-dependent)
Reset memory marker to ”0”
(MCR-dependent)
Reset local data bit to ”0”
(MCR-dependent)
Reset data bit to ”0”
(MCR-dependent)
1**/2
1**/2
2
2
0.4
0.5
0.9
2.4
1.3
3.0
3.8
4.3 2.3+
3.0+
2.6+
3.2+
2.6+
2.7+
3.6+
4.3+
[AR1,m]
[AR2,m]
Parame-
ters Set I/Q/M/L/DBX/DIX (MCR-dependent) to
”0”. (addressed (area-crossing) via
AR1/AR2 or via parameter) 2 –
–
– +
+
+
= I/O
M
L
DBX/DIX
Assign RLO to input/output
(MCR-dependent)
Assign RLO to memory marker
(MCR-dependent)
Assign RLO to local data bit
(MCR-dependent)
Assign RLO to data bit
(MCR-dependent)
1**/2
1**/2
2
2
0.3
0.5
0.9
2.3
1.1
2.6
3.8
4.4 2.2+
2.9+
2.5+
3.0+
2.5+
2.3+
3.6+
4.3+
[AR1,m]
[AR2,m]
Parame-
ters Assign RLO to I/Q/M/L/DBX/DIX (via AR1,
AR2 (area-crossing) or via parameter) 2 – +
Status word for: BR A1 A0 OV OS OR STA RLO /FC
Instruction depends on: – – – – – – – Yes –
Instruction controls: – – – – – 0 Yes – 0
* + time for loading the address of the instruction
** With direct instruction addressing