Siemens 6DR2410, Manual

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Manual 1 Technical Description
1.4 Function Principle
1.4.3 Self-diagnostics of the CPU
SIPART DR24 6DR2410
C79000-G7476-C153-03
19
!
WARNING
The relays used on the interface relay module are designed for a
maximum rating of AC 250 V in overvoltage class III and
contamination factor 2 according to DIN EN 61010 Part 1.
The same applies for the air and creep lines on the circuit board.
Resonance increases up to twice the rated operating voltage may
occur when phase shift motors are controlled. These voltages are
available at the open relay contact. Therefore such motors may only
be controlled under observance of the technical data and the
pertinent safety conditions via approved switching elements.
1.4.3 Self-diagnostics of the CPU
The CPU runs safety diagnostics routines which run after only a reset or cyclically. The CPU is
familiar with two different types of reset.
- Power on reset
Power on reset always takes place when the 5 V supply drops below 4.45 V, i.e. the power
supply is interrupted for longer than specified in the technical data.
All parameters and configurations are reloaded from the user program memory into the
RAM. At batt = YES (factory setting) the current process variables and status signals are
loaded from the battery--backed RAM. At batt = no the startup conditions are fixed (see
chapter 1.5.9, page 91).
At dPon = YES in hdEF the digital displays flash as identification after a power--on reset,
acknowledgement is given by the shift key (tA5).
Flashing is suppressed with dPon = no.
The fault message source nPon is set to low at power on reset. (See chapter 1.5.5,
page 36).
- Watch dog reset
When a watch-dog-reset occurs the parameters and configurations from the user program
memory are re-loaded into the RAM. The current process variables and the status signals
are read out of the RAM for further processing.
There are no flashing signals on the front module.
CPU--tESt appears in the digital displays dd1 and dd2 for a maximum 5 s after every reset.
Every error detected by the self--diagnostics leads to a flashing error message on the digital
displays dd1 and dd2 with defined states of the analog and digital outputs. The fault message
output St of the y
hold
module becomes low. The reactions listed in the table are only possible of
course (since this is a self--test) if the errors occur in such a way that the appropriate outputs or
the front module can still be controlled properly or the outputs themselves are still functioning.