Siemens 6DR2410, Manual

Page: 74 / 276

1 Technical Description
1.5 Functional Description
1.5.8 Complex Functions (Arithmetic blocks c, d, h)
Manual
72
SIPART DR24 6DR2410
C79000-G7476-C153-03
Restarting after a power failure
Power ON Reaction
bAtt = no
bAtt = YES
(hdEF)
Clock goes to t = 0 of the 1st interval of the selected program and stops
Clock continues running from t
power off
D
Inputs d*.01 to d*.12
Input Output
Start
d*.01
Stop
d*.02
Res
d*.03
Fast
d*.04
Clock stop
d*.4
Remarks
x x
"
x 1 Reset to start of selected program
x 1 0/1 x 1 Start blocked, clock stopped
"
0 0/1 0 0 Clock running time synchronously
0/1
1)
0 0/1 1 0 Clock runs with acceleration factor
"
= rising edge 1 = High
x = no effect 0 = Low
* = consecutive number of the block d
1)
Clock must be started
- Start d*.01
Every positive edge at d*.01 starts the clock and thus the program selected by the prese-
lection inputs (see there), if d*.02 (stop) = low. Start takes place after reset and end of
the program with the time t = 0 of the 1st interval
After clearing the stop function, the start edge continues the program from the state
which existed before the stop function. If several preselection inputs d*.06 to d*.12 are
occupied with high or a selected program has no intervals, the clock is not started.
- Stop d*.02
With d*.02 = Hi the clock is stopped, the output d*.4A (Clock Stop) becomes Hi, the ana-
log and binary outputs d*.5A to d*14(A) retain their values, the input d*.01 (Start) is
blocked. If d*.3A (interval display) is switched with dd3, the decimal point of the display
flashes in the stop function.
- Reset d*.03
Every positive edge at d*.03 sets the clock to t = 0 of the 1st interval of the program se-
lected with the preselection inputs (see there). The clock is at a standstill and the output
d*.4A is high. If d*.3A (interval display) is switched with dd3, the decimal point of the dis-
play flashes. At t = 0 of the 1st interval, the binary outputs adopt the status of the 1st in-
terval, the analog outputs go to the value at time t = 0 of the 1st interval.
Power on (at bAtt = no), manual reset and all changes in the configuring automatically
trigger the reset for the clock.
- Fast d*.04
The clock runs time synchronously at d*.04 = Low and at d*.04 = High with the set accel-
eration factor (see CLSb) if it was started previously by d*.01.