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Chipset Features Setup
Auto Configuration
Auto Configuration selects predetermined optimal values of chipset parameters. When
Disabled, chipset parameters revert to setup information stored in CMOS. Many fields in
this screen are not available when Auto Configuration is Enabled.
The Choices: Enabled, Disabled.
DRAM Speed Selection
The DRAM timing is controlled by the DRAM Timing Registers. The timings pro-
grammed into this register are dependent on the system design. Slower rates may be
required in certain system designs to support loose layouts or slower memory.
The Choices: 50ns, 60ns.
EDO CASx# MA Wait State
You could select the timing control type of EDO DRAM CAS MA (memory address
bus). The Choices: 1, 2.
EDO RASx# Wait State
You could select the timing control type of EDO DRAM RAS MA (memory address
bus). The Choices: 1, 2.
SDRAM CAS latency Time
You could select CAS latency time in HCLKs of 2/2 or 3/3. The system board designer
should set the values in this field, depending on the DRAM installed. Do no change the
values in this field unless you change specifications of the installed DRAM or the in-
stalled CPU.
The Choices: 2, 3.
