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Advanced Chipset Features
This section allows you to configure the system based on the specific
features of the installed chipset. This chipset manages bus speeds and
access to system memory resources, such as DRAM and the external
cache. It also coordinates communications between the conventional PCI
bus. It states that these items should never need to be altered.
The default settings have been chosen because they provide the best
operating conditions for your system. If you discovered that data was be-
ing lost while using your system, you might consider making any charges.
DRAM Configuration
Options are in its sub-menu.
Press<Enter> to enter the sub-menu of detailed options.
Max Memclock (Mhz)
Places an artificial memory clock limit on the system.
Memory is prevented from running faster than this frequency.
Ø
The choice: Auto,100,133 or 166.
CAS# latency
When synchronous DRAM is installed, the number of clock cycles of
CAS latency depends on the DRAM timing. Don't change this field
from the default value specified by the system designer.
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The choice: Auto, CL=2.0, CL=2.5 or CL=3.0.
RAS# to CAS# delay (tRCD)
This field let you insert a timing delay between the CAS and RAS trobe
signals, and you can use it when DRAM is written to, read from, or
refreshed. Faster performance is gained in high speed, more stable
performance, in low speed. This field is applied only when synchro-
nous DRAM is installed in the system.
Ø
The choice: Auto, 2~7 Bus Clocks.
