LC-32LE340/343
LC-40LE340/343
Pin Name
Dir
Description
R0X0P
68
R0X0N
67
TMDS
Input
TMDS input Port 0 data pair for HDMI and MHL.
R0X1P
70
R0X1N
69
R0X2P
72
R0X2N
71
TMDS
Input
TMDS input Port 0 data pairs for HDMI.
R0XCP
66
R0XCN
65
TMDS
Input
TMDS input Port 0 clock pair for HDMI and MHL.
R1X0P
4
R1X0N
3
TMDS
Input
TMDS input Port 1 data pair for HDMI and MHL.
R1X1P
6
R1X1N
5
R1X2P
8
R1X2N
7
TMDS
Input
TMDS input Port 1 data pairs for HDMI.
R1XCP
2
R1XCN
1
TMDS
Input
TMDS input Port 1 clock pair for HDMI and MHL.
R2X0P
14
R2X0N
13
TMDS
Input
TMDS input Port 2 data pair for HDMI and MHL.
R2X1P
16
R2X1N
15
R2X2P
18
R2X2N
17
TMDS
Input
TMDS input Port 2 data pairs for HDMI.
R2XCP
12
R2XCN
11
TMDS
Input
TMDS input Port 2 clock pair for HDMI and MHL.
R3X0P
22
R3X0N
21
TMDS
Input
TMDS input Port 3 data pair for HDMI and MHL.
R3X1P
24
R3X1N
23
R3X2P
26
R3X2N
25
TMDS
Input
TMDS input Port 3 data pairs for HDMI.
R3XCP
20
R3XCN
19
TMDS
Input
TMDS input Port 3 clock pair for HDMI and MHL.
HDMI Transmitter Port Pins
Signal Name
Pin
Type
Dir
Description
TX0P
60
TX0N
61
TX1P
58
TX1N
59
TX2P
56
TX2N
57
TMDS
Output
HDMI Output Port Data.
TMDS Low Voltage Differential Signal output data pairs.
TXCP
62
TXCN
63
TMDS
Output
HDMI Output Port Clock.
TMDS Low Voltage Differential Signal output clock pair.
Pin Name
Type
Dir
DSCL0
DSCL1
DSCL2
DSCL3
30
34
40
44
LVTTL
Schmitt
Open drain
5-V tolerant
Input
DDC I
2
C Clock for respective port.
These signals are true open drain, and do not pull-down to ground when
power is not applied to the device. These pins require an external pull-up
resistor.
R0PWR5V
R1PWR5V
R2PWR5V
R3PWR5V
32
36
42
46
Power
Input
5V Port detection input for respective port.
Connect to 5V signal from HDMI input connector. These signals require a
10
series resistor and at least a 1 F capacitor to ground. A 100 k pull-
down resistor is also required for these signals.
CBUS_HPD0
CBUS_HPD1
CBUS_HPD2
CBUS_HPD3
31
35
41
45
LVTTL
5-V tolerant
Output
Hot Plug Detect Output for respective port.
Connect to HOTPLUG of HDMI input connector. In MHL mode, this serves
as the respective port control bus.
R4PWR5V
49
Power
Input
5V Standby power or 5V power from 5
th
Receiver port.
If this signal is connected to the VGA cable then it requires a 10 ohm series
resistor and at least a 1 F capacitor to ground. If connected to a local power
supply the resistor is not needed but a capacitor of at least 1 F is
recommended.
DSDA0
DSDA1
DSDA2
DSDA3
29
33
39
43
LVTTL
Schmitt
Open drain
5-V tolerant
Input
Output
DDC I
2
C Data for respective port.
These signals are true open drain, and do not pull-down to ground when
power is not applied to the device. These pins require an external pull-up
resistor.
44
Pin Name
Type
Dir
CSDA
53
LVTTL
Schmitt
Open drain
5-V tolerant
Input
Output
Local Configuration/Status I
2
C Data.
Chip configuration/status is accessed using this I
2
C port. This pin is a true
open drain, so it does not pull to ground if power is not applied.
DSCL4
48
LVTTL
Schmitt
5-V tolerant
Input
DDC I
2
C Clock for VGA port.
These signals are true open drain, and do not pull-down to ground when
power is not applied to the device. This pin requires an external pull-up
resistor.
DSDA4
47
LVTTL
Schmitt
5-V tolerant
Input
output
DDC I
2
C Data for VGA port.
These signals are true open drain, and do not pull-down to ground when
power is not applied to the device. This pin requires an external pull-up
resistor.
CSCL
54
Schmitt
Open drain
5-V tolerant
Input
Local Configuration/Status I
2
C Clock.
Chip configuration/status is accessed using this I
2
C port. This pin is a true
open drain, so it does not pull to ground if power is not applied.
Pin Name
Dir
INT
52
Schmitt
Open drain
8 mA
5-V tolerant
Input
Output
Interrupt Output.
This is an open-drain output and requires an external pull-up resistor.
RSVDL
RSVDL
10
28
Reserved pin
—
These pins must be tied to ground with a 10 k or less resistor during
normal operation. Connecting directly to ground is recommended.
TPWR_CI2CA
55
LVTTL
8 mA
5-V tolerant
Input
Output
I
2
C Slave Address input / Transmit Power Sense Output.
At the end of power-on-reset (POR), this pin is used as an input to latch the
I
2
C sub-address. The level on this pin is latched when the POR transitions
from the asserted state to the de-asserted state. After completion of POR,
this pin is used as the TPWR output, indicating that the selected HDMI input
port is receiving an active TMDS clock. This pin has an internal pull-up to
the MICOMVCC33 power supply. If this signal is pulled-down, a 4.7K ohm
resistor should be used.
Pin Name
Pin
Type
Direct
ion
Description
CEC_A
50
CEC Compliant
5-V tolerant
Input
Output
HDMI compliant CEC I/O used for interfacing to CEC devices.
This signal is electrically compliant with the CEC specification. It connects
to the CEC signal of all HDMI connectors in the system.
As an input, this pin acts as a LVTTL Schmitt triggered input and is 5-V
tolerant. As an output, the pin acts as an NMOS driver with resistive pull-up.
This pin has an internal pull-up resistor.
CEC_D
51
LVTTL
Schmitt
Open drain
5-V tolerant
Input
Output
CEC interface to local system.
This pin is an open drain and requires an external pull-up resistor. This pin
typically connects to a local CPU if the CEC functions are performed by the
CPU directly, and not the CEC controller inside the device.
Pin Name
Power and Ground Pins
Signal Name
Type
VCC33
9, 27, 64
Power
Analog and digital core VCC. Must be supplied at 3.3 V.
MICOM_VCC33
37
Output
During normal mode, this pin provides 3.3 V power to an external
microcontroller. The maximum output current is 30 mA. This pin
requires 1 F capacitor to ground.
SBVCC33
38
Power
3.3V standby power. If 3.3V standby mode is not used, this pin
should be left as not connected.
ePAD
ePad
Ground
ePad must be connected to Ground
.
All analog and digital ground planes are tied together to the ePad,
which
must
be connected to Ground.
62
LC-40LS340
Summary of Contents for LC-40LS340E
Page 27: ...11 c Absolute Ratings d Recommended Operating Conditions e Pin Functions 27 LC 40LS340 ...
Page 37: ...21 c BCM3556 Block Diagram 37 LC 40LS340 ...
Page 46: ...LC 32LE340 343 LC 40LE340 343 30 b Pinning 46 LC 40LS340 ...
Page 52: ...LC 32LE340 343 LC 40LE340 343 35 c Pinning 52 LC 40LS340 ...
Page 57: ...39 15 LOW POWER CEC MICROCONTROLLER NEC uPD78F0503 Pinning 57 LC 40LS340 ...
Page 59: ...b Block Diagram 59 LC 40LS340 ...
Page 60: ...LC 32LE340 343 LC 40LE340 343 Figure 8 Pin Diagram 60 LC 40LS340 ...
Page 74: ...LC 32LE340 343 LC 40LE340 343 57 Video Settings Audio Settings 74 LC 40LS340 ...
Page 75: ...58 Options 1 Menu Options 2 Menu 75 LC 40LS340 ...
Page 76: ...LC 32LE340 343 LC 40LE340 343 59 Tuner Settings Menu Source Settings Menu 76 LC 40LS340 ...
Page 77: ...60 Diagnostic Menu 21 General Block Diagram 77 LC 40LS340 ...
Page 78: ...LC 32LE340 343 LC 40LE340 343 NOTES 78 LC 40LS340 ...
Page 100: ...LC 32LE340 343 LC 40LE340 343 NOTES 100 LC 40LS340 ...
Page 121: ...NOTES 121 LC 40LS340 ...