36
GPIO0
1
I/O
General purpose I/O
5V tolerant
Controllable pull-up
TSERR _GPIO2
2
O
TS error flag
General purpose I/O
5V tolerant
Controllable pull-up
TSSYNC
3
O
TS sync flag
Controllable pull-up
Selectable output current
TSVALID
4
O
TS valid flag
Controllable pull-up
Selectable output current
TSCLK
5
O
TS clock output
Controllable pull-up
Selectable output current
VSS 6
㧙
Digital Ground
n/a
CVDD 7
㧙
1.2V digital power
supply
n/a
MVDD 8
㧙
1.2V digital power
supply
n/a
Supplies memory power
MVSS 9
㧙
Digital Ground
n/a
VSS 10
㧙
Digital Ground
n/a
DVDD 11
㧙
3.3V digital power
supply
n/a
TSDATA0
12
O
TS data output
Controllable pull-up
Selectable output current
TSDATA1
13
O
TS data output
Controllable pull-up
Selectable output current
CVDD 14
㧙
1.2V digital power
supply
n/a
VSS 15
㧙
Digital Ground
n/a
TSDATA2
16
O
TS data output
Controllable pull-up
Selectable output current
TSDATA3
17
O
TS data output
Controllable pull-up
Selectable output current
MVSS 18
㧙
Digital Ground
n/a
MVDD 19
㧙
1.2V digital power
supply
n/a
Supplies memory power
CVDD 20
㧙
1.2V digital power
supply
n/a
VSS 21
㧙
Digital Ground
n/a
38
DDS-0100
Version: 0.10
Released: 01-May-09
- 17 -
CXD2820R
Name
No. I/O
Function
Equivalent
Circuit Note
supply
MVSS 42
㧙
Digital Ground
n/a
PVSS 43
㧙
Analog Ground
n/a
PVDD 44
㧙
1.2V analog power
supply
n/a
Supplies PLL power
XVDD 45
㧙
2.5V analog power
supply
n/a
Supplies crystal oscillator
power
XTALO
46
O
Crystal oscillator output
Leave open when external
clock input to XTALI
XTALI
47
I
Crystal oscillator input
External clock input pin
XVSS 48
㧙
Analog Ground
n/a
AINM
49
I
IF input (-)
AINP
50
I
IF input (+)
AVSS 51
㧙
Analog Ground
n/a
AVDD 52
㧙
2.5V analog power
supply
n/a
Supplies IF ADC power
RFAIN
53
I
RF level monitor
RVDD 54
㧙
3.3V digital power
supply (*1)
n/a
Supplies RF level monitor
ADC power
VSS 55
㧙
Digital Ground
n/a
CVDD 56
㧙
1.2V digital power
supply
n/a
TUNERDAT
57
I/O
Tuner I
2
C data
5V tolerant
TUNERCLK
58
O
Tuner I
2
C clock
5V tolerant
DVDD 59
㧙
3.3V digital power
supply
n/a
VSS 60
㧙
Digital Ground
n/a
CVDD 61
㧙
1.2V digital power
supply
n/a
PLLBPN
62 I
PLL
bypass
5V tolerant
1: Use PLL
0: Bypass PLL
RFAGC_GPIO1
63 I/O
RFAGC output
General purpose I/O
PWM output
5V tolerant
Controllable pull-up
CAUTION: intermediate
voltage input is prohibited.
IFAGC
64 O
IFAGC
output
PWM output
CAUTION: 5V input is
prohibited.
53
LC-40LS340
Summary of Contents for LC-40LS340E
Page 27: ...11 c Absolute Ratings d Recommended Operating Conditions e Pin Functions 27 LC 40LS340 ...
Page 37: ...21 c BCM3556 Block Diagram 37 LC 40LS340 ...
Page 46: ...LC 32LE340 343 LC 40LE340 343 30 b Pinning 46 LC 40LS340 ...
Page 52: ...LC 32LE340 343 LC 40LE340 343 35 c Pinning 52 LC 40LS340 ...
Page 57: ...39 15 LOW POWER CEC MICROCONTROLLER NEC uPD78F0503 Pinning 57 LC 40LS340 ...
Page 59: ...b Block Diagram 59 LC 40LS340 ...
Page 60: ...LC 32LE340 343 LC 40LE340 343 Figure 8 Pin Diagram 60 LC 40LS340 ...
Page 74: ...LC 32LE340 343 LC 40LE340 343 57 Video Settings Audio Settings 74 LC 40LS340 ...
Page 75: ...58 Options 1 Menu Options 2 Menu 75 LC 40LS340 ...
Page 76: ...LC 32LE340 343 LC 40LE340 343 59 Tuner Settings Menu Source Settings Menu 76 LC 40LS340 ...
Page 77: ...60 Diagnostic Menu 21 General Block Diagram 77 LC 40LS340 ...
Page 78: ...LC 32LE340 343 LC 40LE340 343 NOTES 78 LC 40LS340 ...
Page 100: ...LC 32LE340 343 LC 40LE340 343 NOTES 100 LC 40LS340 ...
Page 121: ...NOTES 121 LC 40LS340 ...