MD-M3/M1
– 40 –
Figure 40 SCHEMATIC DIAGRAM (8/14)
A
B
C
D
E
F
G
H
1
2
3
4
5
6
1
6
2
9
7
8
3
12
11
10
C45
100/10
C36
8.2P(CH)
C35
8.2P(CH)
C37
47/10
C31
100/6.3
IC2
LC78640E
SERVO SIGNAL
CONTROL
R93
10K
Q91 KRC107 M
Q93
KRC107 M
C27
0.1
C34
0.022
26
047
C44
0.1
C30
0.1
C78 100P
C77 100P
C76 100P
C75 100P
C74 100P
C73 100P
C72 0.01
C71 100P
R16
100K
R17
100K
R12
680
R19
10
R14
1.2K
6
K
35 15K
38 8.2K
39 15K
R71
R72
1K
1K
R73
1K
R74
1K
R75
1K
1K
1K
1K
R76
R77
R78
40 1K
Q62
KTC3203 Y
C64
47/10
R63
150
C62
100/6.3
Q61
KTA1271 Y
R96
47K
R95
47K
R94
47K
L61
0.82
µ
H
R98
47K
R92
47K
ZD60 DZ5.1A
ZD61
DZ5.6B
Q92 KTC3199 GR
R87
120
R88 6.8K
R20
220
C85
0.001
C83
0.001
R90
4.7K
C81
0.022
R64
100
L62
2.2
µ
H
R91
4.7K
C90
3.3
R80
1M
13
80
R44
1K
R65
470
C39
0.022
C38
0.022
CNP11
CNP12
CNP14
28 29 30 31
32 33 34 35
36 37 38 39 40
52
53
54
55
56
57
58
59
60
61
62
63
64
LASER
CONT1
CONT2
CONT3
CONT4
CONT5
PCK
C2F
EFLG
TEST
XVSS
ASLRCK
SBCK
PW
SBSY
SFSY
16M
DATA
ASDACK
DATACK
LRSY
ASDFIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PCKIST
VVSS
PDO2
PDO1
VVDD
FR
HFL
SLCIST
SLCO
EFMIN
JITTC
JITTV
BH
FE
TE
VREF
ADAVDD
ADAVSS
PHREF
BHREF
–
+
25 26
27
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65
CE
CL
DI
DO
INT
WRQ
RES
DRF
VDD5V
VSS
CONT6
CONT7
V/P
FSEQ
DEFECT
EFMO
S/H
D/A
SW
A/D
SW
JITER
DEFECT
CONTROL
GENERAL
ERROR
CORRECT
AUDIO
OUT
1BIT DAC
SERIAL
OUT
SUBCODE DECODE
CRC
COMMAND
INTERFACE
GENERAL
PLL
VCEC
CLV
CONTROL
50
49
48
47
46
45
44
43
42
41
51
EMPH
MUTEL
MUTER
LVDD
LCHO
LVSS
RVSS
RCHO
RVDD
XVDD
LPF
SPDO
SLDO
FG
GND(D)
PUIN (CLK)
PROGRAM
MDAVCC
MDDVDD
MDDGND1
MDDGND2
CD+6V
CDGND1
CDGND2
VF2
VF1
AMP FAN
AMP MUTE
SY MUTE
AMP HPSW
AMP LEVEL
DIGOUT
D.GND
DIGIN
BACKUP
PDOWN
RESET
MD-ST
DSCK
SERCH
KDATA
MDDATA
DSTB
D.GND
D.GND
D.GND
D.GND
DVDD
DVDD
PSWCK
LOADSW
AVCC
L.IN
AA.GND
R.IN
AD.GND
L.OUT
AA.GND
R.OUT
SERCH
MD-ST
PDOWN
V LOAD
MD RES
–12V(A)
+12V(A)
REC L
REC R
GND(A)
CD/MD L
GND(A)
CD/MD R
+12V(D)
GND(D)
–30(VP)
+12V(D)
KDATA
DSCK
LOADSW
CE
CL
DI
DO
INT
WRQ
RES
DRF
DGND
PU-IN
CD_CHACK
MDDATA
MD DSTB
GND(A)
+5V
LID SW(DATA)
VDD5V
POWER ON
AMP TEMP
AMP HPSW
AMP LEVEL
DRF
WRQ
INT
CE
CL
CD SO
DSCK
CD SI
V LOAD
MD DSTB
CD RES
MDDATA
MD-ST
SERCH
PDOWN
MD RES
AMP MUTE
AMP FAN
–31(VP)
SY MUTE
LOADSW
KDATA
RESET
+5V(D)
DOUT
DOUT
FSX
CD+7V
+7V
XOUT
XIN
6
5
4
3
2
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
CLOCK
GENERATOR
AUTO
ADJUST
SLICE LEVEL
CONTROL
FRAME SYNC
DETECT,PROTECT
INSERT
EFM DECODE
DIGITAL FILTER
1
2
3
1
2
3
+3.3V
–12V(A)
+12V(A)
GND(D)
TO POWER SECTION
INTERPOLATION
MUTE
ATTENUATION DEEMPHASIS
EXTERNAL AUDIO IN
SERVO
PROCESSEROR
R97
47K
VF2
VF1
+B
+B
+B
CNS15
+B
–B
+B
V
U
T
S
R
Q
P
O
N
M
14
15
16
18
17
1
2
3
20
22
23
24
V LOAD
ADGND
8
9
10
6
12
11
4
5
7
21
+B
+B
+B
0V
0V
0V
3.27V
3.27V
3.27V
0V
1.1V
1.6V
1.6V
1.65V
1.6V
0V
PH(RFENV)
1.62V
1.66V
1.64V
1.65V
3.27V
0V
1.59V
1.65V
1.81V
1.65V
TDO
FDO
TBLO
1.64V
1.64V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
3.27V
3.27V
1.47V
1.17V
0V
3.27V
3.27V
3.22V
1.70V
0V
0V
1.71V
3.22V
1.48V
1.47V
0V
0V
0V
0V
1.58V
1.42V
0V
0V
3.26V
0V
0V
0V
0V
4.85V
4.85V
5.14V
0V
5.14V
0V
5.14V
0V
4.83V
0V
0V
0V
3.26V
3.26V
1.51V
0V
0V
0V
0V
0V
4.00V
4.38V
1.11V
3.5V
5.04V
5.65V
7.02V
7.02V
6.39V
3.28V
TO PRE SECTION
R18
1M
XL1
16.934MHz
VDD
+B
FWD02
FWD03
CNPD02
DISPLAY PWB
DISPLAY PWB
CNPD03
1
6
1
28
CNW2002
CN1501
MD MAIN PWB
1
28
1.65V
P32 1-H
P32 1-F
P51 12-C
P35 12-H
P36 2-D~H
CD SIGNAL
MD SIGNAL
RECORD SIGNAL
MD-M1
• The numbers
1
to
12
are waveform numbers shown in page 54.
1
13
Summary of Contents for CP-M1
Page 74: ...MD M3 M1 74 MEMO ...