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LC-26D4U
LC-32D4U
LC-37D4U
MAJOR IC INFOMATIONS
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IC3800 (MM1630AQ)
Video switch controlled by I2C BUS to select 4 color difference signals (component signals), 5 S-video signals and
8 composite signals.
The analog video signal input from each input terminal and the tuner is sent to this IC and selected. The video output
signal output from here and the component video signal are input into the video decoder circuit IC400 with a built-
in Y/C separation via the low-pass filter and into the A/D converter (AD988810) via the low-pass filter (IC5703),
respectively.
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IC3805 (NJM2750M)
4-input/1-output stereo audio selector.
Composed of switch operation amplifier and controlled by 2-input digital signals. The audio signal input from each
input terminal is sent to this IC and selected. The audio output signal output from here is fed to the digital amplifier
via IC2501 (SOUND PROCESSOR).
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IC400 (TC90A92A)
Video decoder IC with a built-in Y/C separation.
TC90A92A is the LSI in which Y/C separation function and a multi-system video decoder are integrated into one
chip.
10-bit and 8-bit ADCs for analog input interface and 4-Mbit memory for NTSC 3D Y/C separation are incorporated.
Chrominance demodulation is performed after Y/C separation, and the output interface is output digitally (601/656).
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IC3703 (SM5301AS)
Fifth order Butterworth low-pass filter with a sync clamp function.
The filter characteristics depend on the input video signals, and the cutoff frequency can be set randomly by DC
control voltage of the pin 21.
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IC3700 (AD988810)
A/D converter with built-in PLL AMP
After controlling level of analog RGB and HDMI Y/Cb/Cr input signals, A/D conversion is performed using the clock
generated by PLL to output signals at TTL level. Video signal sent to this IC is digitally converted and sent to IC801
[F.P.G.A. (Field Programmable Gate Arrays)].
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IC802 (IXA835WJ)
F.P.G.A. (Field Programmable Gate Arrays) for synchronous processing and signal selector of each digitalized input
signal.
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IC3300 (IXA091WJ)
Performs data conversion for video signal processing, such as I/P conversion and scaling, to fit digitalized video
signal to output resolution.
Output digital signal is sent to IC3201 (LVDS TRANSMITTER).
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IC3201 (THC63LVD823)
170 MHz LVDS (Low Voltage Differential Signaling) 24 bit interface chip set for transmission. It is an LSI for
serializing and transmitting RGB signals, HD/VD/blanking signals and pixel clocks.
LVDS is a method for transmitting high-speed digital signals via cables driven by low-amplitude differential signals.
1LINK consists of five pairs of differential signals. The TA, TB, TC, and TD pairs are used for data transmissions,
and the TCLK pair is used for pixel clock transmissions. Seven data bits of TA, TB, TC and TD each (28 in total)
are transmitted per pixel clock.
The input RGB (24 bit) signal and sync signal (HD, VD and DE) are allocated to these 28 data.
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IC4601 (IXB001WJ)
Input signal is Dual link LVDS with RGB of 8 bits each. Output signal performs CMOS output with RGB of 8 bits each,
sync signal (H, V, DE) synchronizing with the input signal and free running sync signal (H, V, DE) output.
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IC4602 (IXB272WJ)
EEPROM for storing 10-bit gamma correction and cross-talk correction data.
Data is read into IC4601 (IXB001WJ) on start-up.
