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cRIO LVDT 9312 Module
Technical Description
Issue
05
24/05/2022
3.3
LVDT9312
C
OMPACT
RIO
L
AB
VIEW
D
RIVERS DEFINITION
The driver application is demonstrated within a LabVIEW example project. To copy the driver components into a
new project, use the drag & drop function. (see 3.4.1.4)
LabVIEW driver components
The LabVIEW FPGA software driver for the LVDT9312 module includes eight driver VIs which control the serial
data transfer between the modules and the FPGA backplane. (Refer to the VI-library
„SET_SPI_Drivers.lvlib“).
For
each possible cRIO chassis slot a dedicated driver VI is provided.
Each module slot applies to its own driver-VI
Each driver VI uses 2 FIFO buffers to communicate with the LabVIEW application. The FIFO buffers are organized
in CommandIN-FIFOs and CommandOUT-FIFOs for bidirectional data flow from the application to the module and
vice versa. Note that these buffers are pre-defined in the example project in terms of name and size and must
not be modified to ensure correct operation. (see 3.4.1.4)
Each driver-VI uses two command FIFOs
The user interface is formed from eight slot specific „Functions
-
VIs“, which perform the driver calls by u
se of the
communication-FIFOs.
(Refer to the VI-
library „SET_
LVDT_9312
_Functions.lvlib“).
To make the driver VIs and its dedicated FIFOs for the application accessible, a high level function VI is provided.
For each possible cRIO slot one function VI. These VIs control the correct data flow and the organisation
between the application and the drivers. Again these VIs are predefined and must not be modified to ensure
proper operation.
