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3-19
Table 3-10 Electrical Characteristics of Thermal Head(LTPD347)
(at 25
°
C )
Rated value
Item Symbol Conditions
MIN TYP MAX
Unit
Thermal head
heat element resistance
R
H
1455 1500 1545
Ω
Thermal Head
drive voltage
V
P
21.6 24.0 26.4 V
Thermal Head
drive current
I
P
at the number of simultaneously
activated dots = 288
- -
5.23
A
2.7 3.3 3.6 V
Logic voltage
V
dd
4.75 5 5.25 V
Logic current
I
dd
f
DI
=1/2f
CLK
-
-
48
mA
High V
IH
CLK,
DI,
LAT
, DST
0.8V
dd
- V
dd
V
Input voltage
Low
V
IL
CLK,
DI,
LAT
, DST
0
-
0.2 V
dd
V
High I
IH
DI V
IH
= V
dd
-
-
0.5
μ
A
DI input current
Low
I
IL
DI V
IL
= 0V
-
-
-0.5
μ
A
High I
IH
DST V
dd
-
-
0.5
μ
A
2.7V
≤
V
dd
≤
3.6V -
-
-16
μ
A
DST input current
(High active)
Low
I
IL
DST V
IL
= 0V
4.75
≤
V
dd
≤
5.25V -
-
-24.5
μ
A
High I
IH
CLK V
IH
= V
dd
-
-
2.0
μ
A
CLK input current
Low
I
IL
CLK V
IL
= 0V
-
-
-2.0
μ
A
High I
IH
LAT V
IH
= V
dd
-
-
2.0
μ
A
LAT
input current
Low I
IL
LAT
V
IL
= 0V
-
-
-2.0
μ
A
2.7V
≤
V
dd
≤
3.6V -
-
8
MHz
CLK frequency
f
CLK
4.75
≤
Vdd
≤
5.25V -
-
16
MHz
2.7V
≤
V
dd
≤
3.6V 56
-
-
ns
CLK pulse width
t1
See the
Timing
Chart.
4.75
≤
V
dd
≤
5.25V 28
-
-
ns
2.7V
≤
V
dd
≤
3.6V 30
-
-
ns
DI setup time
t2
See the
Timing
Chart.
4.75
≤
V
dd
≤
5.25V 15
-
-
ns
2.7V
≤
V
dd
≤
3.6V 10
-
-
ns
DI hold time
t3
See the
Timing
Chart.
4.75
≤
V
dd
≤
5.25V 10
-
-
ns
LAT
setup time
t4
See the Timing Chart.
100
-
-
ns
LAT
pulse width
t5
See the Timing Chart.
100
-
-
ns
LAT
hold time
t6
See the Timing Chart.
50
-
-
ns
DST setup time
t7
See the Timing Chart.
300
-
-
ns
2.7V
≤
V
dd
≤
3.6V 30
-
-
μ
s
LAT
wait time
t8*
See the
Timing
Chart.
4.75
≤
V
dd
≤
5.25V 15
-
-
μ
s
*: If MIN at " LAT wait time" in the table cannot be secured, it may cause Vp voltage fluctuations.