SM-C93
SM-C93 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.0 - Author: A.R - Reviewed by M.B. - Copyright © 2021 SECO S.p.A.
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For EMI/ESD protection, common mode chokes on USB data lines, and clamping diodes on USB data and voltage lines, are also needed. Switch with settable
current limit on power lines are recommended.
3.2.1.12
PCI Express interface signals
The SM-C93 module can offer externally up to four PCI Express lane, which are directly managed by the Intel
®
family of SOCs formerly coded as Elkhart Lake.
PCI express Gen 3.0 (8GT/s) is supported.
Here following the signals involved in PCI express management
PC/ PCIE_A_RX-: PCI Express lane #0, Receiving Input Differential pair
PC/PCIE_A_TX-: PCI Express lane #0, Transmitting Output Differential pair
PCIE_/ PCIE_A_REFCK-: PCI Express Reference Clock for lane #0, Differential Pair
PCIE_A_RST#: Reset Signal that is sent from SMARC Module to a PCI-e device available on the carrier board. Active Low, +3.3V_RUN electrical level with a 100
pull-down resistor. It can be used directly to drive externally a single RESET Signal. In case Reset signal is needed for multiple devices, it is recommended to provide
for a buffer on the carrier board.
PCIE_A_CKREQ#: PCI Express Port A clock request signal, used from a PCI-e device to request the need for PCI Express Reference Clock. Bidirectional signal,
+3.3V_RUN electrical level with a 10k pull-up resistor.
PC/ PCIE_B_RX-: PCI Express lane #1, Receiving Input Differential pair
