SM-B69
SM-B69 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.1 - Author:A.R - Reviewed by M.B. - Copyright © 2020 SECO S.p.A.
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3.2.1.8
SPI interface signals
The Intel
®
family of SOCs formerly coded as Apollo Lake offers also one dedicated controller for Serial Peripheral Interface (SPI), which can be used for connection
of EEPROMs and Serial Flash devices.
SPI interface supports master mode only can support speed up to 25Mbps.
The signals related to SPI0 are as follows:
SPI0_CS0#: SPI channel #0 primary Chip select, active low output signal. Electrical level +1.8V_RUN
SPI0_CK: SPI channel #0 Clock Output to carrier board s SPI embedded devices. Electrical level +1.8V_RUN
SPI0_DIN: SPI0 channel #0 Master Data Input, electrical level +1.8V_RUN.
SPI0_DO: SPI0 channel #0 Master Data Output, electrical level +1.8V_RUN.
The signals related to SPI1 are as follows:
ESPI_CS0#: SPI channel #1 primary Chip select, active low output signal. Electrical level +1.8V_RUN
ESPI_CS1#: SPI channel #1 secondary Chip select, active low output signal. Electrical level +1.8V_S. This signal must be used only in case there are two SPI
devices on the carrier board, and the first chip select signal (ESPI_CS0#) has already been used. It must not be used in case there is only one SPI device
ESPI_IO_0: SPI channel #1 Master Data Input, electrical level +1.8V_RUN.
ESPI_IO_1: SPI channel #1 Master Data Output, electrical level +1.8V_RUN.
3.2.1.9
Audio interface signals
The Intel
®
family of SOCs formerly coded as Apollo Lake supports I2S audio format, thanks to native support offered by the processor to this audio codec standard.
Here are following the signals related to I2S Audio interface:
AUDIO_MCK: Master clock output to Audio codec. Output from the module to the Carrier board, electrical level +1.8V_RUN
I2S0_LRCK: Left& Right audio synchronization clock. Bi-Directional between the module to the Carrier board, electrical level +1.8V_RUN
I2S0_SDOUT: Digital audio Output. Output from the module to the Carrier board, electrical level +1.8V_RUN
I2S0_SDIN: Digital audio Input. Input from the module to the Carrier board, electrical level +1.8V_RUN
I2S0_CK: Digital audio clock. Bi-Directional between the module to the Carrier board, electrical level +1.8V_RUN
All these signals have to be connected, on the Carrier Board, to an I2S Audio Codec. Please refer to the chosen Codec s Reference Design Guide for correct
implementation of audio section on the carrier board.
The Intel
®
family of SOCs formerly coded as Apollo Lake supports also HD audio format, thanks to native support offered by the processor to this audio codec
standard.
Here are following the signals related to HD Audio interface:
