LEVY
LEVY User Manual - Rev. First Edition: 1.0 - Last Edition: 1.0 - Author: S.O. - Reviewed by N.P. - Copyright © 2022 SECO S.p.A.
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3.2.2.1
LCD Display Support Signals
The panel control signals are:
LCD0_VDD_EN: Panel #0 VDD enable signal. Set high to enable. +1.8V_RUN electrical level Output.
LCD0_BKLT_EN: Panel #0 Backlight Enable signal. It can be used to turn On/Off the backlight
’
s lamps of a connected LVDS display. +1.8V_RUN electrical level
Output
LCD0_BKLT_PWM: This signal can be used to adjust the Panel #0 backlight brightness in displays supporting Pulse Width Modulated (PWM) regulations. +1.8V_RUN
electrical level Output
LCD1_VDD_EN: Panel #1 VDD enable signal. Set high to enable. +1.8V_RUN electrical level Output
LCD1_BKLT_EN: Panel #1 Backlight Enable signal. It can be used to turn On/Off the backlight
’
s lamps of a connected LVDS display. +1.8V_RUN electrical level
Output.
LCD1_BKLT_PWM: This signal can be used to adjust the Panel #1 backlight brightness in displays supporting Pulse Width Modulated (PWM) regulations. +1.8V_RUN
electrical level Output.
I2C LCD signals are managed by SoC I2C2 bus.
I2C_LCD_DAT: LCD I2C Data. This signal is used to read the LCD display EDID EEPROM. +1.8V_RUN electrical level Bidirectional with a 2k2
Ω
pull-up resistor.
I2C_LCD_CLK: LCD I2C Clock: This signal is used to read the LCD display EDID EEPROM. +1.8V_RUN electrical level Output with a 2k2
Ω
pull-up resistor.
On this bus a selection of addresses must be left reserved for on-board peripherals as presented in this table (also consider that this bus is shared with CAM0 from
par. 3.2.2.4):
I2C2 Bus
Address
Peripheral
0x2D
DSI Bridge
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oduct design