10.12
SEL-787 Relay
Instruction Manual
Date Code 20081022
Testing and Troubleshooting
Self-Test
Table 10.8
Relay Self-Tests
(Sheet 1 of 2)
Self-Test
Description
Normal Range
Protection
Disabled on
Failure
Alarm
Status
Front-Panel
Message on Failure
External RAM
(power up)
Performs a read/write test on
system RAM
Yes
Latched
Status Fail
RAM Failure
External RAM
(run time)
Performs a read/write test on
system RAM
Yes
Latched
Status Fail
RAM Failure
Internal RAM (power
up)
Performs a read/write test on
CPU RAM
Yes
Latched
Status Fail
RAM Failure
Internal RAM
(run time)
Performs a read/write test on
CPU RAM
Yes
Latched
Status Fail
RAM Failure
Critical RAM
(settings)
Performs a checksum test on the active
copy of settings
Yes
Latched
Status Fail
CR_RAM Failure
Code RAM
(run time)
Verify instruction matches Flash image
Yes
Latched
Status Fail
CR_RAM Failure
Code Flash
(power up)
SEL
BOOT
qualifies code with a
checksum
NA
NA
Code Flash
(run time)
Checksum is computed on the entire
code base
Yes
Latched
Status Fail
ROM Failure
Data Flash
(power up)
Checksum is computed on critical data
Yes
Latched
Status Fail
Non_Vol Failure
Data Flash (run time) Checksum is computed on critical data
Yes
Latched
Status Fail
Non_Vol Failure
Front Panel
(power up)
Fail if ID registers do not match
expected or if FPGA programming is
unsuccessful
No
Not
Latched
I/O Board Failure
Check if ID register matches part
number
Yes
Latched
Status Fail
I/O Card Failure
DeviceNet
Board Failure
DeviceNet card does not respond in
three consecutive 300 ms time out
periods
NA
NA
COMMFLT
Warning
Exception Vector
CPU error
Yes
Latched
Vector nn
Relay Disabled
CT Board (power up) Fail if ID register does not match part
number
Yes
Latched
Status Fail
CT Card Fail
CT Board A/D
Offset Warn
Measure dc offset at each input channel –50 mV to
+50 mV
No
Not
Latched
CT Board A/D Fail
Fail if any bits between 15 and 12 are
set or if number of conversions not as
expected
Yes
Latched
Status Fail
CT Card Fail
VT Board (power up) Fail if ID register does not match part
number
Yes
Latched
Status Fail
Volt Card Fail
VT Board A/D
Offset Warn
Measure dc offset at each input channel –50 mV to
+50 mV
No
Not
Latched
VT Board A/D Fail
Fail if any bits between 15 and 12 are
set or if number of conversions not as
expected
Yes
Latched
Status Fail
Volt Card Fail
Summary of Contents for SEL-787
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