– 42 –
AUTOMATIC RF AGC ADJUSTMENT SYSTEM (Continued)
When the command data for the Automatic RF AGC Adjustment is input from
the remote control, the CPU starts the automatic adjustment program.
Automatic RF AGC Adjustment Program
First, the CPU presets the BUS data to “011001” (25/64 steps) for the 6-bit RF
AGC Delay Control Register within IC101, the Signal Processor.
With a standard field intensity (68 dBµ), specified video signal input to the TV,
the RF AGC voltage (approximately 3.1V) is output from pin 6 of IC101, the
Signal Processor. The RF AGC voltage will be input to pin 28 (A/D input) of
the CPU.
At 100 msec* after the RF AGC Delay Control Register has been preset, the
A/D input voltage at pin 28 of the CPU is read by the 6-bit comparator within
the CPU.
* ....Due to the time constant of the RF AGC voltage, the CPU will wait for 100
msec after the RF AGC Delay Control Register is preset before reading
the A/D input voltage so that a stable RF AGC voltage can be read.
When the A/D input voltage is between 69/128 Vcc (2.70V) and 85/128 Vcc
(3.32V), the RF AGC adjustment is determined to have been normally
completed and the BUS data in the RF AGC Delay Control Register is
memorized into IC802, the Memory IC.
If, when the A/D input voltage is read, the A/D input voltage is higher than
85/128 Vcc (3.32V), the CPU will begin increasing the BUS data for the RF
AGC Delay Control Register from “011001” (25/64 steps) up to “111111”
(64/64 steps) by 1/64 step until the A/D input voltage becomes just lower than
or equal to 85/128 Vcc (3.32V).
If, when the A/D input voltage is read, the A/D input is lower than 69/128 Vcc
(2.70V), the CPU will begin decreasing BUS data for the RF AGC Delay
Control Register from “011001” (25/64 steps) down to “000000” (0/64 steps)
by 1/64 step until the A/D input voltage becomes just higher than 69/128 Vcc
(2.70V).
When the A/D input voltage is out of the range from 69/128 Vcc (2.70V) to
85/128 Vcc (3.32V) after all, the CPU will preset the BUS data for the RF AGC
Delay Control Register to “011001” (25/64 steps) and store the data in IC802,
the Memory IC.
