COMe-mEL10 - User Guide Rev. 1.1
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Sub-screen
Next Level Sub-screens / Description
PCH-IO
Configuration>
(continued)
PCI Express
Configuration>
(continued)
PCIE Express
Root Port
[1 to 4]>
(continued)
EDPC>
Extensions for Downstream Port
Containment
[Enabled, Disabled]
URR>
Unsupported Request Reporting
[Enabled, Disabled]
FER>
Fatal error reporting
[Enabled, Disabled]
NFER>
Non- Fatal error reporting
[Enabled, Disabled]
CER>
Correctable error reporting
[Enabled, Disabled]
SEFE>
System error on fatal error
[Enabled, Disabled]
SENFE>
System error on non-fatal error
[Enabled, Disabled]
SECE>
System error on correctable error
[Enabled, Disabled]
PME SCI>
[Enabled, Disabled]
Hot Plug>
[Enabled, Disabled]
Advance Error
Reporting>
[Enabled, Disabled]
PCIE Speed>
Configure PCIe Speed
[Auto, Gen1, Gen2, Gen3]
Transmitter Half
Swing>
[Enabled, Disabled]
Detect Timeout>
Time (msec) the reference code waits
for link to exit detect state for enabling
ports before assuming no device and
potentially disabling the port. [0]
Extra Bus
Reserved>
Extra bus reserved (0-7) for bridges
behind this root bridge 0]
Reserved
Memory>
Range (1-20 MB) for this root port.
[10]
Reserved I/O>
Reserved IO Range (4K, 8K, 12K, 16K,
20K) for this port. [4]
PCH PCIe LTR Configuration
LTR>
PCIe latency reporting
[Enabled, Disabled]
Snoop
Latency
Override>
Disabled- disable override
Manual- Manually enter override values
Auto- maintain default BIOS flow
[Disabled, Manual, Auto]
