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3.5"-eIO-GPA - User Guide, Rev. 1.0 

 

www.kontron.com 

 

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Table 3: Supply Voltages ................................................................................................................................................................................ 18

 

Table 4: Jumper List ......................................................................................................................................................................................... 19

 

Table 5: Top Side Internal Connector Pin Assignment ......................................................................................................................... 19

 

Table 6: Rear Side Internal Connector Pin Assignment ...................................................................................................................... 20

 

Table 7: Connector Panel Side Connector List ........................................................................................................................................ 21

 

Table 8: Pin Assignment Power Input Connector CN14 ...................................................................................................................... 23

 

Table 9: Pin Assignment DP Connector CN11, CN12 .............................................................................................................................. 24

 

Table 10: Pin Assignment Ethernet Connectors CN9, CN10 ............................................................................................................... 25

 

Table 11: Pin Assignment CN2 ...................................................................................................................................................................... 26

 

Table 12: Pin Assignment CN3 ..................................................................................................................................................................... 27

 

Table 13: Pin Assignment CN4 ..................................................................................................................................................................... 28

 

Table 14: Pin Assignment CN5 ..................................................................................................................................................................... 29

 

Table 15: Pin Assignment CN7 ..................................................................................................................................................................... 30

 

Table 16: Pin Assignment CN15 .................................................................................................................................................................... 31

 

Table 17: Pin Assignment JP3 ....................................................................................................................................................................... 35

 

Table 18: List of Acronyms ........................................................................................................................................................................... 36

 

 

List of Figures 

Figure 1: Accessories of 3.5’’-eIO-GPA ....................................................................................................................................................... 12

 

Figure 2: Screw Hole Pattern for Install 3.5’’-eIO-GPA & Applicable 3.5’’ SBC .............................................................................. 12

 

Figure 3: Secure Fixing Bolts Onto SBC ..................................................................................................................................................... 13

 

Figure 4: Secure Fixing Bolts Onto SBC ..................................................................................................................................................... 13

 

Figure 5: Block Diagram 3.5"-eIO-GPA ....................................................................................................................................................... 15

 

Figure 6: Board Dimensions .......................................................................................................................................................................... 17

 

Figure 7: Top Side.............................................................................................................................................................................................. 19

 

Figure 8: Rear Side .......................................................................................................................................................................................... 20

 

Figure 9: Connector Panel Side .................................................................................................................................................................... 21

 

Figure 10: Power Input Connector CN14 ................................................................................................................................................... 23

 

Figure 11: DP Connector CN11, CN12 ............................................................................................................................................................ 24

 

Figure 12: Ethernet Connector CN9, CN10 ................................................................................................................................................ 25

 

Figure 13: SMBus Wafer CN2 ....................................................................................................................................................................... 26

 

Figure 14: SMBus Wafer CN3 ....................................................................................................................................................................... 27

 

Figure 15: GSPI Wafer CN4 ............................................................................................................................................................................ 28

 

Figure 16: UART Wafer CN5 .......................................................................................................................................................................... 29

 

Figure 17: Power Output Wafer CN7 .......................................................................................................................................................... 30

 

Figure 18: B2B Connector CN15 .................................................................................................................................................................... 31

 

Figure 19: Jumper Connector ........................................................................................................................................................................ 35

 

Figure 20: Power Mode Selection JP3 ....................................................................................................................................................... 35

 

 

Summary of Contents for Kontron 3.5"-eIO-GPA

Page 1: ...USER GUIDE www kontron com 3 5 eIO GPA Doc User Guide Rev 1 0 Doc ID To be Determined...

Page 2: ...3 5 eIO GPA User Guide Rev 1 0 www kontron com 2 This page has been intentionally left blank...

Page 3: ...suitable for the specified use without further testing or modification Kontron expressly informs the user that this user guide only contains a general description of processes and instructions which...

Page 4: ...ly at your risk To minimize the risks associated with your products and applications you should provide adequate design and operating safeguards You are solely responsible for compliance with all lega...

Page 5: ...rt Find Kontron contacts by visiting https www kontron com support Customer Service As a trusted technology innovator and global solutions provider Kontron extends its embedded market strengths into a...

Page 6: ...scribed by the law may endanger your life health and or result in damage to your material ESD Sensitive Device This symbol and title inform that the electronic boards and their components are sensitiv...

Page 7: ...before performing any work on this product Earth ground connection to vehicle s chassis or a central grounding point shall remain connected The earth ground cable shall be the last cable to be discon...

Page 8: ...oduct then re pack it in the same manner as it was delivered Special care is necessary when handling or unpacking the product See Special Handling and Unpacking Instruction Quality and Environmental M...

Page 9: ...agram 15 3 2 Component Main Data 16 3 3 Dimensions 17 3 4 Environmental Conditions 17 3 5 Power Supply Voltage 18 4 Connector Locations 19 4 1 Top Side 19 4 2 Rear Side 20 4 3 Connector Panel Side 21...

Page 10: ...t CN15 31 Table 17 Pin Assignment JP3 35 Table 18 List of Acronyms 36 List of Figures Figure 1 Accessories of 3 5 eIO GPA 12 Figure 2 Screw Hole Pattern for Install 3 5 eIO GPA Applicable 3 5 SBC 12 F...

Page 11: ...d s special features and is not intended to be a standard PC AT textbook New users are recommended to study the short installation procedure stated in the following chapter before switching on the pow...

Page 12: ...the wrist strap periodically 1 M to 10 M Transport and store the board in its antistatic bag Handle the board at an approved ESD workstation Handle the board only by the edges 3 5 eIO GPA is supplied...

Page 13: ...e single board computer onto the chassis by aligning the screw holes on the single board computer Figure 2 pos 1 2 with the screw holes on the chassis Secure the single board computer with the three s...

Page 14: ...comply with the requirements as defined in IEC 62368 1 according Clause 6 2 2 to power source category PS2 Limited Power Source 2 2 Chassis Safety Standards Before installing the 3 5 eIO GPA and the...

Page 15: ...3 5 eIO GPA User Guide Rev 1 0 www kontron com 15 3 Specifications 3 1 Block Diagram Figure 5 Block Diagram 3 5 eIO GPA...

Page 16: ...optional trade off with GSPI 32 KByte EEPROM optional trade off with I2 C mPCIe 1x mPCIe optional Full Size w PCIe x1 USB 2 0 trade off with 2nd 2 5 GbE SIM Card Holder 1x SIM Card Holder optional Nan...

Page 17: ...pliant with the following environmental conditions It is the customer s responsibility to provide sufficient airflow around each of the components to keep them within the allowed temperature range Tab...

Page 18: ...must monitor the supply voltage and shut down if the supply is out of range refer to the actual power supply specification in order to ensure safe operation of the 3 5 eIO GPA and the single board com...

Page 19: ...optional 2 JP3 Power Mode Selection 7 7 1 Table 5 Top Side Internal Connector Pin Assignment Item Designation Description See Chapter 3 CN1 eDP Panel Connector optional 4 CN2 SMBus Wafer 7 1 5 CN3 I2...

Page 20: ...Rev 1 0 www kontron com 20 4 2 Rear Side Figure 8 Rear Side Table 6 Rear Side Internal Connector Pin Assignment Item Designation Description See Chapter 1 CN15 B2B Connector 7 6 2 MPCIE1 Mini PCI Expr...

Page 21: ...or Panel Side Table 7 Connector Panel Side Connector List Item Designation Description See Chapter 1 CN9 2 5 GbE LAN1 RJ45 Connector 6 3 2 CN10 2 5 GbE LAN2 RJ45 Connector 6 3 3 CN11 DP Port 1 Connect...

Page 22: ...pin numbers in the connector Signal The abbreviated name of the signal at the current pin The notation XX states that the signal XX is active low Note Special remarks concerning the signal Designatio...

Page 23: ...f the power connector is not allowed Hot plugging might damage the board In other words turn off main supply etc to make sure all the power lines are turned off when connecting to the motherboard Figu...

Page 24: ...rt Lane 1 transmitter differential pair 7 ML_Lane2p DisplayPort Lane 2 transmitter differential pair 8 GND Ground 9 ML_Lane2n DisplayPort Lane 2 transmitter differential pair 10 ML_Lane3p DisplayPort...

Page 25: ...the transmit pair in 10Base T and 100Base TX In MDI crossover mode this pair acts as the BI_DB pair and is the receive pair in 10Base T and 100Base TX TX2 TX2 In MDI mode this is the second pair in 2...

Page 26: ...n 1 25 mm pitch SMBus wafer CN2 is used for system management communications Figure 13 SMBus Wafer CN2 Table 11 Pin Assignment CN2 Pin Signal Description Note 1 SMB_CLK SMBus clock 2 SMB_DATA SMBus da...

Page 27: ...pitch I2 C wafer CN3 is used for sensor or other control function Figure 14 SMBus Wafer CN3 Table 12 Pin Assignment CN3 Pin Signal Description Note 1 I2C_CLK I2 C clock 2 I2C_DATA I2 C data 3 GND Powe...

Page 28: ...Interface clock 2 GSPI_MOSI Generic Serial Peripheral Interface date transmission from master to slave master output slave input 3 GSPI_MISO Generic Serial Peripheral Interface data transmission from...

Page 29: ...ignal Description Note 1 2 3 UART_RXD Universal Asynchronous Receiver Transmitter received data 4 UART_RTS Universal Asynchronous Receiver Transmitter request to send 5 UART_TXD Universal Asynchronous...

Page 30: ...em for possible application expansion It is available only for the variants with the power input connector CN14 Figure 17 Power Output Wafer CN7 Table 15 Pin Assignment CN7 Pin Signal Description Note...

Page 31: ...put 400 mA max 3 3 3VSB_IN 3 3 V standby power input 400 mA max 4 3 3VSB_IN 3 3 V standby power input 400 mA max 5 3 3VSB_IN 3 3 V standby power input 400 mA max 6 GND Ground 7 eDP_DP0_TX0 eDP DP 0 La...

Page 32: ..._D USB 2 0 differential pair 38 USB0_D USB 2 0 differential pair 39 GND Ground 40 UART_TXD UART transmitted data 3 3 V 41 UART_RXD UART received data 3 3 V 42 UART_CTS UART clear to send 3 3 V 43 UART...

Page 33: ...PCIe Lane 1 transmitter pair 76 PCIE1_TX PCIe Lane 1 transmitter pair 77 GND Ground 78 PCIE1_RX PCIe Lane 1 receiver pair 79 PCIE1_RX PCIe Lane 1 receiver pair 80 GND Ground 81 NC Not connected 82 NC...

Page 34: ...de Rev 1 0 www kontron com 34 Pin Signal Description Note P3 12V_IN 12V_OUT 12 V power input 12 V power output 3 A max P4 12V_IN 12V_OUT 12 V power input 12 V power output 3 A max Connector Type B2B 2...

Page 35: ...weezers to pull the pin cap off the pins and move it to the desired position 7 7 1 Power Mode Selection JP3 The 2 0 mm pitch Power Mode Selection jumper JP3 can be used to specify whether to enable th...

Page 36: ...rive HDMI High Definition Multimedia Interface LAN Local Area Network LED Light Emitting Device LVDS Low Voltage Differential Signaling ME F W Management Engine Firmware mPCIe mini Peripheral Componen...

Page 37: ...utions based on highly reliable state of the art embedded technologies Kontron provides secure and innovative applications for a variety of industries As a result customers benefit from accelerated ti...

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