S&T Kontron 3.5"-eIO-GPA, User Manual

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3.5"-eIO-GPA - User Guide, Rev. 1.0
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4/ Connector Locations
4.1. Top Side
Figure 7: Top Side
Table 4: Jumper List
Item Designation Description See Chapter
1 JP1 eDP Backlight & Panel Power Selection (optional) -
2 JP3 Power Mode Selection 7.7.1
Table 5: Top Side Internal Connector Pin Assignment
Item Designation Description See Chapter
3 CN1 eDP Panel Connector (optional) -
4 CN2 SMBus Wafer 7.1
5 CN3 I 2 C Wafer 7.2
6 CN4 GSPI Wafer 7.3
7 CN5 UART Wafer 7.4
8 CN6 Nano SIM Card Holder for MPCIE1 (optional) -
9 CN7 Power Output Wafer 7.5
10 CN8 Activity Indicator Header for MPCIE1 (optional) -
1
9
3 4 5 6 7 8
2
10