Samsung DVD-807K, Service Manual

Page: 81 / 165

Circuit Descriptions
7-16
Samsung Electronics
A clock locked by PLL on the basis of input RF signal, PLL clock and trigger may be shown at DVD playback.
The eye of RF signal is open in PLL lock state.
• CH1 : RFIN(DIC1-50, RF Input signal)
(Vp-p is approx. 2.5V)
• CH4 : PLCK (DIC1-26, PLL clock)
Fig. 7-25
It shows RF signal and RLLD signal waveform at DVD refresh and RLLD waveform is regular as 1.65V. If a
serious error occurs in disc, RLLD signal is outputted as correction signal and enters PLL control system after
summing with phase difference signal.
• CH1 : RFIN(DIC1-50, RF Input signal)
• CH2 : RLLD (DIC1-38, RLLD signal at disk
refresh)
Fig. 7-26
RLLD signal is ouputted at disc halt or occurrence of serious error.
• CH1 : RFIN(DIC1-50, RF Input signal)
• CH2 : RLLD (DIC1-38, RLLD at disc halt or
occurrence of serious error)
Fig. 7-27
1
4
1
2
1
2