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Rohm LAPIS MK71351, Manual

The Rohm LAPIS MK71351 is a versatile microcontroller perfect for a variety of applications. Easily interface with sensors and other devices using its many I/O ports. The user manual is available for free download from our website, providing in-depth guidance on how to make the most of this powerful device.

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PJDK71351-03 

 

MK71351 

 

3/24 

■

 

Pin Layout   

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

TOP VIEW 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND 

OUT_ANT 

NC 

VPGM 

TMODE 

VDDCORE 

GND 

RESETX 

SWDIO 

GND 

NC 

GPIO1 
/mode1 

GPIO8 

GPIO7 

GPIO6 

GPIO5 

GPIO11 

GPIO12 

GPIO15 

GND 

VBAT

 

VDD

IO
 

G

PIO

1

3

 

G

PIO

1

0

 

G

PIO

4

 

G

PIO

3

 

SWDCLK

 

G

PIO

0

 

 

 

 

 

1 

2 

3 

4 

5 

6 

7 

8 

9 

10 

11 

12 

13 

14 

15 

16 

17 

18 

19 

20 

28 

27 

26 

25 

24 

23 

22 

21 

29 

30 

31 

32 

33 

RFIO 

Summary of Contents for LAPIS MK71351

Page 1: ...tion v4 2 low enegy compliant LSI TC3567CFSG Integrated 26MHz 32 768kHz crystal oscillator Integrated NOR Flash Memory 128 KB 105 times of erase and program Integrated bypass capacitor and external co...

Page 2: ...3 MK71351 2 24 Block Diagram ANTENNA DCDC LC Filter X tal 26MHz X tal 32 768kHz OUT_ANT RFIO VBAT GND MK71351 VDDIO Bluetooth v4 2 LSI TC3567C SWDCLK SWDIO GPIO 13 RESETX TMODE UART SPI I2C PWM ADC VP...

Page 3: ...NT NC VPGM TMODE VDDCORE GND RESETX SWDIO GND NC GPIO1 mode1 GPIO8 GPIO7 GPIO6 GPIO5 GPIO11 GPIO12 GPIO15 GND VBAT VDDIO GPIO13 GPIO10 GPIO4 GPIO3 SWDCLK GPIO0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1...

Page 4: ...operation mode switching pin 11 GND GND 12 VBAT Power supply 2 0 to 3 6 V 13 VDDIO Power supply 2 0 to 3 6 V 14 GPIO13 Pull up IOSHPUD General purpose IO pin 15 GPIO10 Hi Z IOASHPUD ADC input general...

Page 5: ...ose I O pin During reset internal Pull up resistor turns ON and is put into the Disable state After the pin configuration by software processing this pin can function as a function pin or a GPIO pin o...

Page 6: ...is released this pin turns into the I O of the serial wire debugger data If this function is not used the pin should be OPEN 18 SWDCLK Input Pull Down ISHPUD Serial wire debugger clock pin During res...

Page 7: ...ADC1 input GPIO4 Disable Hi Z Disable Pull up Pull down off PWM3 output SPI DIN input ADC2 input GPIO5 Disable Pull up Input Pull up 2 UART1 TX output SPI DOUT output GPIO6 Disable Pull up Input Pull...

Page 8: ...not included Pin Symbol Description 1 29 NC Open 7 VDDCORE Open 10 SWDIO Open 14 GPIO13 Open 15 GPIO10 Open 16 GPIO4 Open 17 GPIO3 Open 18 SWDCLK Open 19 GPIO0 Open 21 GPIO15 Open 22 GPIO12 Open 23 GP...

Page 9: ...nput power RFIO 6 dBm Storage temperature Tstg 40 to 85 C 1 When voltage is applied to the VDDIO power supply do not connect VBAT to GND Otherwise current flows from VDDIO to VBAT through the circuit...

Page 10: ...26 MHz crystal oscillation has stopped 32 kHz crystal oscillation 2 4 uA Current consumption at low power Without connection IDDS Deep Sleep 26 MHz crystal oscillation has stopped 32 kHz crystal oscil...

Page 11: ...sensitivity PSENS PER 30 8 1 93 5 dBm Maximum receiving Power PRXMAX PER 30 8 1 10 dBm Condition VBAT VDDIO 3 0V GND 0V 1 PER 30 8 corresponds to BER 0 1 Power Supply Sequence VBAT VDDIO Master Clock...

Page 12: ...ost MCU through the UART interface User App mode This is the Application mode which downloads the program code to the built in SRAM It is possible to operate this mode alone without the external host...

Page 13: ...ed after the Boot operation In the User App mode the operation is possible without host MCU This operation assumes a Use Case in which the data collected from the sensor device is transferred to anoth...

Page 14: ...type package is very sensitive affected by heating from reflow process humidity during storage Therefore before you perform reflow mounting contact sales office for the product name package name pin n...

Page 15: ...n can be used to rewrite the application data MK71351 NC OUT_ANT RFIO VDDCORE TMODE GPIO8 GPIO7 GPIO5 GPIO6 RESETX VPGM SWDIO SWDCLK GPIO0 GPIO15 GPIO1 VBAT GND 24 25 26 27 9 19 21 GPIO3 GPIO4 GPIO10...

Page 16: ...1351 AT Command Application User s Manual when using the AT Command Application Operation mode setting HCI mode User App mode GPIO1 L OPEN MK71351 NC OUT_ANT RFIO VDDCORE TMODE RESETX VPGM GPIO0 GPIO1...

Page 17: ...PJDK71351 03 MK71351 17 24 Appendix Reference Land Pattern...

Page 18: ...ion zone to edge of board no metal on any layer except mechanical LGA pads and RF trace line 10mm 3 45mm 0 Note Main Board Substrate material is FR4 and substrate thickness is 1 0 1 6 mm Do not place...

Page 19: ...oduct for any additional compliance requirements required with this module installed for example digital device emissions PC peripheral requirements etc IMPORTANT NOTE In the event that any of these c...

Page 20: ...cuments The following related documents are available and should be referenced as needed MK71351 SDK related documents Download MK71351 SDK and related documents from the location related to Bluetooth...

Page 21: ...PJDK71351 03 MK71351 21 24 Revision History Document No Date Page Description Previous Edition Current Edition PEDK71351 03 Feb 8 2019 Preliminary edition...

Page 22: ...as exemplified below please contact and consult with a LAPIS Semiconductor representative transportation equipment i e cars ships trains primary communication equipment traffic lights fire crime prev...

Page 23: ...which may be damaged due to Electrostatic discharge Please take proper caution during manufacturing and storing so that voltage exceeding Product maximum rating won t be applied to the Products Please...

Page 24: ...or losses resulting non compliance with any applicable laws or regulations 2 When providing our Products and technologies contained in the Specification to other countries you must abide by the proced...

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