The Constant Fraction Discriminators CFD8c, CFD7x, CFD4c, CFD1c and CFD1x (11.0.1701.1)
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Figure 3.14b: Position of Veto input socket on the CFD8c front panel. For the CFD4c it is found on the rear panel
‘Veto’ mode:
The CFD timing outputs are disabled while a NIM level (-0.8 V on 50 Ohm) is present on the Veto input.
This is shown in the left picture of Figure 3.15b. This mode is factory-set by default
‘Gating’ mode: The CFD timing outputs are enabled while a NIM level (-0.8 V on 50 Ohm) is present on the Veto input
(see right picture of Figure 3.15b).
‘Neutral’ mode: The CFD timing outputs are independent of the level on the Veto input (i.e. functionality turned off)
Figure 3.15b: Trace of the input signal to the Veto socket (upper trace) and signal traces of CFD
timing signals (lower trace, integrated over many events) for Veto (left) and Gating mode (right)
In order to work reliably, a level transition on the Veto input must be switched at least 10 ns before it can effectively
block/enable the CFD timing outputs. Likewise, it should last about 10 ns longer than the desired time period for
blocking/enabling the CFD timing outputs.
Figure 3.16b: Jumper Block (here: inside CFD1c) for defining the logic modes:
Veto (left picture, default setting), Gating (middle picture) and Neutral (right picture)
The Veto / Gating modes are selected by a jumper block for each channel inside the modules. Figure 3.16b shows jumper
settings for all modes. The Veto mode is factory-set by default
For producing an adequate signal for the Veto input a
RoentDek
LogX4 unit can be used.
