User's Guide ADI-8 DD © RME
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8.3 Word Clock Input and Output
Input
The ADI-8 DD's word clock input is available to both the left and the right part. It is active, when
EXT is chosen in the clock section. The signal at the BNC input can be single or double speed,
the ADI-8 DD automatically adapts to it. As soon as a valid signal is detected, the EXT LED is
constantly lit, otherwise it is flashing slowly.
Thanks to RME's
Signal Adaptation Circuit
, the word clock input still works correctly even with
heavily mis-shaped, dc-prone, too small or overshoot-prone signals. Thanks to automatic signal
centering, 300 mV (0.3V) input level are sufficient in principle. An additional hysteresis reduces
sensitivity to 1.0 V, so that over- and undershoots and high frequency disturbances don't cause
a wrong trigger.
The ADI-8 DD's word clock input is shipped as
high impedance type (not terminated). A push
switch allows to activate internal termination
(75 Ohms). The switch is found on the back
between the ADAT ports. Use a small pencil or
similar and carefully push the blue switch so
that it snaps into its lock position. Another push
will release it again and de-activate the
termination.
Output
The word clock output is constantly active and basically delivers the sample rate of the left part
as word clock signal. As long as it is working with internal clock, the output word clock is ex-
tremely stable and jitter-free (< 1 ns). The device can even be used as a central word clock
generator (except for the limitation of having only one output). In slave mode (EXT/INPUT), the
amount of jitter is depending on the input signal.
A word clock signal fed to the ADI-8 DD can even be passed through via the word clock output,
because the output signal is phase locked to the input signal (0°). Thus the usual T-adaptor at
the input is not needed, and the ADI-8 DD can be used as a signal refresher. This application is
even more interesting, because the exceptional input of the ADI-8 DD (1 Vss sensitivity instead
of the usual 2.5 Vss, dc cut, Signal Adaptation Circuit) guarantees a secure function also with
critical word clock signals.
The ADI-8 DD's word clock output is derived from the left part, because the TDIF ports
need a fixed word clock reference.
For this reason, the word clock signal derived from AES, TDIF and ADAT has a phase shift of
90° at the output. This has no effect when being used with AES or ADAT, because these for-
mats don't require a certain relation to the word clock signal.
The wordclock output as well as all ADAT and TDIF ports always operates in Single Speed
mode only. At 96 kHz, the word clock output will therefore be a 48 kHz signal.
Thanks to a low impedance, but short circuit proof output, the ADI-8 DD delivers 4 Vss to 75
Ohms. For wrong termination with 2 x 75 Ohms (37.5 Ohms), there are still 3.3 Vss at the out-
put.
