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User's Guide ADI-8 DD   © RME

 

 

11.2 AES/EBU - SPDIF 

 
The most important electrical properties of 'AES' and 'SPDIF' can be seen in the below table. 
AES/EBU is the professional balanced connection using XLR plugs. The standard is being set 
by the 

Audio Engineering Society

 based on the AES3-1992. For the 'home user', SONY and 

Philips have omitted the balanced connection and use either Phono plugs or optical cables 
(TOSLINK). The format called S/P-DIF (SONY/Philips Digital Interface) is described by IEC 
60958. 

 
 

Type 

AES3-1992 

IEC 60958 

Connection 

XLR 

RCA / Optical 

Mode 

Balanced 

Un-balanced 

Impedance 

110 Ohm 

75 Ohm 

Level 

0.2 V up to 5 Vss 

0.2 V up to 0.5 Vss 

Clock accuracy 

not specified 

I: 

±

 50ppm 

II: 0,1% 
III: Variable Pitch 

Jitter 

< 0.025 UI (4.4 ns @ 44.1 kHz)  not specified 

 

 
Besides the electrical differences, both formats also have a slightly different setup. The two 
formats are principally compatible, because the audio information is stored in the same place in 
the data stream. However, there are blocks of additional information, which are different for 
both standards. In the table, the meaning of the first byte (#0) is shown for both formats. Al-
ready in the first bit there is the decision, whether the following bits should be read as Profes-
sional or Consumer information. 
 

Byte 

Mode 

Bit 0 

Pro 

P/C 

Audio? 

Emphasis 

Locked  Sample Freq. 

Con 

P/C 

Audio? 

Copy 

Emphasis 

Mode 

 
As can be seen, the meaning of the following bits differs quite substantially  in both formats. If a 
device like a common DAT recorder only has an SPDIF input, it usually understands only this 
format. In most cases, it will switch off when being fed Professional-coded data. The table 
shows that a Professional-coded signal would lead to malfunctions for copy prohibition and 
emphasis, if being read as Consumer-coded data. This actually happened in former times, but 
if found today then it was implemented to force the costumer to buy a more expensive device. 
 
Nowadays many devices with SPDIF input can handle Professional subcode. Devices with 
AES3 input almost always accept Consumer SPDIF (passive cable adapter necessary). 

Summary of Contents for ADI-8 DD

Page 1: ...8 DD SyncAlign SyncCheck Intelligent Clock Control TM Hi Precision 24 Bit 96 kHz 8 Channel Dual Universal Format Converter 8 Channel Sample Rate Converter ADAT optical TDIF 1 AES EBU Interface TDIF 1...

Page 2: ...es and Notes 10 1 8 channel AES to ADAT TDIF Converter 96 kHz 22 10 2 8 channel AES to 2 x ADAT 2 x TDIF Splitter 48 kHz 22 10 3 2 channel AES to 8 channel TDIF ADAT Splitter 96 kHz 22 10 4 8 channel...

Page 3: ...LL Switchable high end sample rate converters SRC allow for both sample rate conversion in best possible quality as well as clock decoupling of all AES EBU inputs All of the ADI 8 DD s I Os support 96...

Page 4: ...ing 8 channels 24 bit 96 kHz Bitclock PLL ensures perfect synchronisation even in varispeed operation Lock range 33 kHz 56 kHz Jitter when synced to input signal 2 ns TDIF 2 x D sub 25 pol according t...

Page 5: ...z equalling 8 channels 24 bit 96 kHz TDIF 2 x D sub 25 pin according to TDIF 1 Standard 8 channels 24 bit up to 48 kHz Copy Mode up to 2 x 8 channels 24 bit 48 kHz Sample Split Dual Line 2 x 8 channel...

Page 6: ...des and the ability to read a man ual When being switched on for the first time the ADI 8 DD comes up in a default mode which should be appropriate for most applications Both converters are set to the...

Page 7: ...operate independently from each other no matter which of the three inputs they use sen ding a signal to their hard wired outputs But there are two special cases in which the optical ADAT outputs work...

Page 8: ...or constantly lit The ADAT TDIF to AES section is layed out in a similar way After choosing the input signal AES ADAT or TDIF the clock source and the sampling rate there is a field with 16 LEDs for...

Page 9: ...input is transformer balanced and ground free Channel status and copy protection are being ignored Thanks to a highly sensitive input stage also SPDIF signals can be processed by us ing a simple cable...

Page 10: ...n by a LEVEL LED The green LED becomes active from 90 dBFS and above a higher level yields brighter light Thus only one LED is necessary to see if there is an audio signal or digital zero only noise f...

Page 11: ...channels 5 to 8 When AES STATE OPT is selected ADAT AUX is used from the right part of the ADI 8 DD to send channels 1 2 in SPDIF format The TDIF 1 connectors of the ADI 8 DD are fully compatible to a...

Page 12: ...nd 30 They show the whole signal routing inside the ADI 8 DD in a clear way also for this Copy Mode The sample rate converter is a part of the AES EBU inputs so when selecting ADAT TDIF it is still on...

Page 13: ...BU outputs in logical order ADAT TDIF 1 2 3 4 5 6 7 8 AES EBU 1L 1R 2L 2R 3L 3R 4L 4R If the input data is encoded with Sample Split S MUX or Double Line the AES output has to be set to DS mode manual...

Page 14: ...is being displayed by means of 16 LEDs A missing or invalid input signal is indicated by slow flashing of the SOURCE LED In case ADAT or TDIF are selected all four SYNC and Emphasis LEDs are showing t...

Page 15: ...l status coding which is being used for transmitting further information The output signal coding of the ADI 8 DD has been implemented according to AES3 1992 Amendment 4 32 kHz 44 1 kHz 48 kHz 64 kHz...

Page 16: ...g indicated automatically by the DS LED this is not the case in the right part If you are not sure about the input sampling frequency you can still check it in the left part by switching to AES source...

Page 17: ...yncCheck indi cates reliably if wrong or unequal settings are chosen INPUT As displayed on the front panel the CLOCK SOURCE for the INPUT setting can be the AES TDIF or ADAT input This selection is in...

Page 18: ...e and therefore clicks and drop outs 2 Another example could be connecting to ADAT machines which are not synchronous to each other due to wrong clock setup 3 In order to display those problems optica...

Page 19: ...as it is working with internal clock the output word clock is ex tremely stable and jitter free 1 ns The device can even be used as a central word clock generator except for the limitation of having o...

Page 20: ...based on a fraction of the really needed clock For example SPDIF 44 1 kHz word clock a simple square wave signal has to be multiplied by 128 or 256 This signal then re places the one from the interna...

Page 21: ...lock output that can only be called unsatisfactory If the output breaks down to 3 Volts when terminating with 75 Ohms you have to take into account that a device of which the input only works from 2 8...

Page 22: ...48 kHz SOURCE AES Remark For sample rates below 56 kHz the MAIN and AUX outputs will carry the same data Thus two outputs each can be used for ADAT and TDIF splitter 10 3 2 channel AES to 8 hannel TDI...

Page 23: ...e format the DS function has to be activated manually in order to have the AES outputs transmit 8 channels in Double Speed Single Wire Note When the red AES STATE OPT LED is blinking the ADAT outputs...

Page 24: ...is not active and the input signal is in Single Wire Double Speed format the data will be converted to Double Wire Single Speed Because only 8 physical output channels are available there will only be...

Page 25: ...e rate It was then possible to transmit two channels of 96 kHz data via one AES EBU port But Double Wire is still far from being dead On one hand there are still many devices which can t handle more t...

Page 26: ...in the data stream However there are blocks of additional information which are different for both standards In the table the meaning of the first byte 0 is shown for both formats Al ready in the firs...

Page 27: ...o the mix section of the console simply because they cannot be synchronized This is no problem if a sample rate converter is being used It synchronizes any input signal to the desired sampling rate re...

Page 28: ...clock 44 1 48 kHz DS active 88 2 96 kHz Clock source Input External Word clock Internal Clock source AES TDIF ADAT Clock Section Signal source AES TDIF ADAT Status display Lock of inputs Emphasis Lev...

Page 29: ...GND shield 2 Signal 3 Signal AES EBU and SPDIF are biphase modulated signals therefore polarity doesn t matter Pins 2 and 3 are neither hot nor cold they carry the same signal But as AES3 uses a balan...

Page 30: ...30 User s Guide ADI 8 DD RME 14 Block Diagram...

Page 31: ...810 Manufacturer IMM Elektronik GmbH Leipziger Str 27 D 09648 Mittweida Trademarks All trademarks and registered trademarks belong to their respective owners RME SyncAlign DIGI96 Hammerfall and SyncCh...

Page 32: ...subject to the following two condi tions 1 This device may not cause harmful interference 2 This device must accept any interference received including interference that may cause undesired operation...

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