RIGOL
DG1000Z Performance Verification Guide
15
Gate Time
GateTime1
1.310ms
GateTime2
10.48ms
GateTime3
166.7ms
GateTime4
1.342s
GateTime5
10.73s
GateTime6
>10s
Trigger Characteristics
Trigger Input
Level
TTL-compatible
Slope
Rising or falling (optional)
Pulse Width
>100ns
Latency
Sweep: <100ns (typical)
Burst: <300ns (typical)
Trigger Output
Level
TTL-compatible
Pulse Width
>60ns (typical)
Maximum Frequency
1MHz
Two-channel Characteristics - Phase Offset
Range
0° to 360°
Waveform Phase
Resolution
0.03°
Clock Reference
External Reference Input
Lock Range
10MHz±50Hz
Level
250mVpp to 5Vpp
Lock Time
<2s
Impedance (typical)
1kΩ, AC coupling
Internal Reference Output
Frequency
10MHz±50Hz
Level
3.3Vpp