Renesas Starter Kit+, User Manual

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Renesas Starter Kit+ for RX72N 6. Configuration
R20UT4443EG0100 Rev. 1.00 Page 32 of 57
Nov 30, 19
6.6 Analog Power, ADC and DAC Configuration
Table 6-7 below details the function of the option links associated with Analog Power, ADC and DAC
Configuration.
Table 6-7: Analog Power, ADC and DAC Configuration Option Links
Signal name
MCU
MCU Peripheral Selection Destination Selection
Pin
Po
rt
Signal Fit DNF
Interface
/Function
Fit DNF
P07
*1
E5 P07
SW3 R88 R124, R89 SW3 - -
JA1-ADTRG R124 R88, R89 JA1.8 R124 R292
JA1-IRQd R89
R88, R124
JA1.23 - -
JA1-DAC1 C3 P05 JA1-DAC1 - - JA1.14 - -
P03 D3 P03
SERIAL-CTS R105 R106 U15.2 - -
JA1-DAC0 R106 R105 JA1.13 - -
P13 N5 P13
OnTFT-VSYNC R293 R292 ONTFT1.33 - -
JA1-ADTRG R292 R293 JA1.8 R292 R124
P43 E4 P43
SERIAL-RTS R108 R109 U17.2 - -
JA1-ADC3 R109 R108 JA1.12 - -
JA1-ADC2 B3 P42 JA1-ADC2 - - JA1.11 - -
P41 A4 P41 SDHI-POWFLT R120
R121 U6.5 - -
JA1-ADC1 R121 R120 JA1.10 - -
P40 D4 P40
RV1-ADC R116 R117 RV1 - -
JA1-ADC0 R117 R116 JA1.9 - -
PE5 C13 PE5
SDRAM-D13
R56 R57
U12.50 - -
JA3-D13 JA3.34 - -
JA5-ADC7 R57 R56 JA5.4 - -
PE4 B14 PE4
SDRAM-D12
R53 R54
U12.48 - -
JA3-D12 JA3.33 - -
JA5-ADC6 R54 R53 JA5.3 - -
PE3 D12 PE3
SDRAM-D11
R65 R66
U12.47 - -
JA3-D11 JA3.32 - -
JA5-ADC5 R66 R65 JA5.2 - -
PE2 B13 PE2
SDRAM-D10
R61 R62
U12.45 - -
JA3-D10 JA3.31 - -
JA5-ADC4 R62 R61 JA5.1 - -
VREFH0 A2 -
UC_VCC R81 R76 - - -
JA1-VREFH R76 R81 JA1.7 - -
VREFL0 A3 -
GROUND R96 R93 - - -
JA1-AVSS R93 R96 JA1.6 - -
AVCC0-1 B2, C2 -
UC_VCC R71
R171, R67 or
R172 , R67
- - -
JA1-AVCC R67
R171, R71 or
R172 , R71
JA1.5 - -
Board_3V3 R171 , R172 R71, R67 - - -
AVSS0-1 B1, C1 -
GROUND R58 R55 - - -
JA1-AVSS R55 R58 JA1.6 - -
*1
: When changing the option link of P07, pay attention to the presence or absence of a pull-up resistor. Leave
the pull-up resistor for SW3 (R194) fitted, otherwise the internal pull-up in the MCU will need to be enabled.