Renesas Starter Kit+ for RX72N
8. Code Development
R20UT4443EG0100 Rev. 1.00
Page 53 of 57
Nov 30, 19
8. Code Development
8.1
Overview
For all code debugging using Renesas software tools, the RSK+ board must be connected to a PC via an
E1/E20/E2 Lite debugger. An E1/E2 Lite debugger is supplied with this RSK+ product.
For further information regarding the debugging capabilities of the E1/E20/E2 Lite debuggers, refer to E1/E20
Emulator, E2 Emulator Lite Additional Document for User's Manual (R20UT0399EJ).
8.2
Compiler Restrictions
The compiler supplied with this RSK+ is fully functional for a period of 60 days from first use. After the first 60
days of use have expired, the compiler will default to a maximum of 128k code and data. To use the compiler
with programs greater than this size you need to purchase the full tools from your distributor.
The protection software for the compiler will detect changes to the system clock. Changes to the system clock back in
time may cause the trial period to expire prematurely.
8.3
Mode Support
The MCU supports Single Chip and Boot Modes (SCI and USB and FINE), which are configured on the RSK+
board. Details of the modifications required can be found in §6.2. All other MCU operating modes are
configured within the MCU’s registers, which are listed in the RX72N Group User’s Manual: Hardware.
Only ever change the MCU operating mode whilst the RSK+ is in reset, or turned off; otherwise the MCU may become
damaged as a result.
8.4
Debugging Support
The E1 Emulator or E2 Emulator Lite (as supplied with this RSK+) supports break points, event points
(including mid-execution insertion) and basic trace functionality. It is limited to a maximum of 8 on-chip event
points, 256 software breaks and 256 branch/cycle trace. For further details, refer E1/E20 Emulator User’s
Manual (R20UT0398EJ) or E2 Emulator Lite User’s Manual (R20UT3240EJ).
8.5
Address Space
For the MCU address space details, refer to the ’Address Space’ section of RX72N Group User’s Manual:
Hardware.
8.6
Note of Flash Access Window Setting Register
This register is used to set the write protection flag and start-up area select flag for setting the flash access
window start address, flash access window end address, and access window.
Once 0 is written to this bit, the bit can never be restored to 1.
Therefore, the access window and the BTFLG bit will never be set again. If set the TM function will never be
disabled, once enabled. Exercise extra caution when handling the FSPR bit.
For details, refer to Section 7.2.9 in the RX72N Group User’s Manual: Hardware.
Summary of Contents for Starter Kit+
Page 57: ...R20UT4443EG0100 RX72N Group ...
