C - 5
REVISION HISTORY
R8C/18 Group, R8C/19 Group Hardware
1.20
Nov 01, 2005
92
Figure 12.19 AIER, RMAD0 to RMAD1 Registers;
Address Match Interrupt Enable Register and Address Match Interrupt
Register i(i=0, 1) revised
102
Figure 14.1 Block Diagram of Timer X;
“Peripheral data bus”
→
“Data Bus” revised
115
14.1.6 Precautions on Timer X;
“When writing “1” (count starts) to ... writing “1” to the TXS bit.”
→
‘ “0” (count stops) can be read ... after the TXS bit is set to “1”.’ revised
116
Figure 14.11 Block Diagram of Timer Z;
“Peripheral Data Bus”
→
“Data Bus” revised
133
14.2.5 Precautions on Timer Z;
“When writing “1” (count starts) to ... writing “1” to the TZS bit.”
→
‘ “0” (count stops) can be read ... after the TZS bit is set to “1”.’ revised
147
Figure 15.3 U0TB to U1TB, U0RB to U1RB and U0BRG to U1BRG
Registers;
“UARTi Transmit Buffer Register (i=0 to 1)” and
“UARTi Receive Buffer
Register (i=0 to 1)” revised
150
Figure 15.6 U0C1 to U1C1 and UCON Registers;
UARTi Transmit / Receive Control Register 1 (i=0 to 1) revised
157
Table 15.5 Registers to Be Used and Settings in UART Mode;
UiBRG: “
−
”
→
“0 to 7” revised
162
Table 16.1 Performance of Comparator
Analog Input Voltage: “0V to Vref”
→
“0V to AVCC” revised
171
Table 17.1 Flash Memory Version Performance;
Program and Erase Endurance: (Program area)
→
(Program ROM),
(Data area)
→
(Data Flash) revised
173
17.2 Memory Map;
“The user ROM ... area ... Block A and B.”
→
“The user ROM ... area (program ROM) ... Block A and B (data flash).”
revised
Figure 17.1 Flash Memory Block Diagram for R8C/18 Group revised
174
Figure 17.2 Flash Memory Block Diagram for R8C/19 Group revised
189
17.4.3.5 Block Erase
“The block erase command cannot ... program-suspend.” added
200
Table 17.10 Interrupt in EW1 Mode;
During automatic programming (program suspend function enabled)
and During automatic programming (program suspend function
disabled) revised
203
Table 18.4 Flash Memory (Program ROM) Electrical Characteristics;
NOTES 3 and 5 revised, NOTE8 deleted
204
T
able 18.5 Flash Memory (Data flash Block A, Block B) Electrical
Characteristics;
NOTES 1 and 3 revised
206
Table 18.8 Reset Circuit Electrical Characteristics (When Using Voltage
Monitor 1 Reset); NOTE 2 revised
Rev.
Date
Description
Page
Summary
