P9415-R-EVK Evaluation Kit
R16UH0015EU0100 Rev.1.0
May 27, 2021
Page 39
Table 45. End Power Transfer Reason Register (0x74)
Address
and Bit
Register Field Name
R/W
Default
Value
Function and Description
0x75 [7]
EPT_POCP
R
0
1 = Indicates over current protect during digital ping
0 = No such error
0x75 [6]
EPT_OTP
R
0
1 = Over current error
0 = No such error
0x75 [5]
EPT_FOD
R
0
1 = FOD error
0 = No such error
0x75 [4]
EPT_LVP
R
0
1 = Vrect is less than low voltage protection threshold
0 = No such error
0x75 [3]
EPT_OVP
R
0
1 = Over voltage error
0 = No such error
0x75 [2]
EPT_OCP
R
0
1 = Over current error
0 = No such error
0x75 [1]
Reserved
R
0
Reserved
0x75 [0]
EPT_CEP_TIMEOUT
R
0
1 = CEP timeout
0 = No such error
0x74 [7]
EPT_TIMEOUT
R
0
1 = Watch dog timeout
0 = No such error
0x74 [6:1]
Reserved
R
0
Reserved
0x74 [0]
EPT_CMD
R
0
1 = End power transfer packet has been received
0 = No such error
Table 46. System Command Register (0x76)
Address
and Bit
Register Field Name
R/W
Default
Value
Function and Description
0x77 [7:0]
Reserved
W
0
Reserved.
0x76 [7]
Reserved
W
0
Reserved.
0x76 [6]
CTCMND
W
0
AP sets 1 to set CT command. The P9415 will read CT command from
CT Command register and implement.
P9415 clears the bit after processing the command.
0x76 [5]
TX_CLRINT
W
0
AP sets 1 to clear interrupt.
P9415 clears the bit after processing the command.
0x76 [4]
Reserved
W
0
Reserved
0x76 [3]
TX_BC
W
0
AP sets 1 to send a proprietary packet to Rx.
P9415 clears the bit after processing the command
0x76 [2]
TX_DIS
W
0
AP sets 1 to disable Tx mode.
P9415 clears the bit after processing the command.
0x76 [1]
Reserved
W
0
Reserved
0x76 [0]
TX_EN
W
0
AP sets 1 to enable Tx mode.
P9415 clears the bit after processing the command
Note
: It costs time to implement the command. AP could write new command to System Command Register
3–5ms after the previous command.
