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P9415-R-EVK Evaluation Kit

 

 

R16UH0015EU0100   Rev.1.0 
May 27, 2021 

 

Page 21  

 

14.  P9415-R TRX Demo PCB v1.1 Schematic 

 

 

*Note [a]

R

28

9

4

7k

47,0.25W/0603

1/16W/0402

R

28

2

NP

WPC RX

TX Coil

C

50

1

uF

AlignY PCB coil

1/16W/0402

1/16W/0402

L

D

O

5

P

0

1/16W/0402

EPP DIS

L

D

O

1

P

8

C23

8

NP

VD

ON

GL

E

GP6

OPTIONAL:STATUS LED FOR EVK

1/16W/0402

50V/0402

10V/0402

/EN

1/16W/0402

10V/0201

AL

GX

_

OD

3

SC

L

C

4

1

3

.3

nF

 

 

  

 

 

 

  

  

  

 

  

  

 

 

 

   

  

  

 

   

  

 

 

 

 

 

L

D

O

1

P

8

W

P

C

_L

C

C

4

0

1

00

n

F

C

3

2

NP

PGOOD

25V/0603

C

3

6

1

00

n

F

R

2

90

1

00

k

R6

NP

Additional

External Clamping 

Circuit for OVP  (OPTIONAL)

50V/0402

50V/0402

GP3

R

17

NP

C

24

1

0

.1

uF

D

EM

OD

1

0.25W/0603

R

1

07

NP

O

U

T_

S

1/16W/0402

R

28

4

5

.1

k

L

D

O

1

P

8

L

C_

WP

C1

C

4

6

1

0n

F

R

4

8

5

.1

k

Renesas Electronics America, Inc.

              REA, INC.

C

24

5

NP

GP6

R54

NP

Si8816

D7

L

E

D

0

60

3

_d

io

de

GP2

R

3

3

NP

50V/0402

SD

A

10V/0402

VOU

T

1/16W/0402

R

32

1

0k

J1

CO

N1

1

2

3

4

5

VOU

T

C23

9

NP

G

ND4

1/16W/0402

1/16W/0402

C

43

1

0u

F

50V/0402

OPTIONAL : THERMISTOR

R

35

4

7k

VOU

T

1/16W/0402

C

3

4

1

00

n

F

R

31

4

7k

1/16W/0402

VD

ON

GL

E

VR

EC

T

(Pull up OD2_INT with AP IO voltage)

1/16W/0402

OD

2

Interrupt Status LED

25V/0603

W

P

C

_L

C

1/16W/0402

50V/0402

COMMUNICATION INTERFACE

Output LED

C

2

4

1

nF

 1

0

V

1/16W/0402

INHI

B

IT

Q1

NP

A1

B1

A2

B2

(GP0 POWER GOOD)

AL

GX

_

OD

3

R

29

8

0

AC

2

1/16W/0402

GR

E

EN

25V/0603

R

2

76

4

7k

SC

L_O

D0

GP6

AC

1

R

28

5

5

.1

k

THIS DOCUMENT CONTAINS INFORMATION PROPRIETARY

TO Renesas Electronics America, Inc. (REA).

USE OR DISCLOSURE WITHOUT THE WRITTEN

PERMISSION OF AN OFFICER OF REA IS 

EXPRESSLY FORBIDDEN

50V/0402

D

1

9

B

A

T

5

4X

V

2T

1

G

VOU

T

R

2

94

2

20

k

+

C

2

23

NP

L

D

O

1

P

8

R

2

81

1

0k

25V/0201

R

2

80

0

R53

NP

L

D

O

1

P

8

C

2

6

2

2n

F

R

2

92

5

.1

k

O

D2

_

INT

C

22

6

NP

GP2

t

R

T

1

L

D

O

1

P

8

D8

1.8

V

R

5

1

1

0k

GP1

50V/0402

R

7

70

NP

VR

EC

T

R

29

7

4

7k

L

D

O

1

P

8

O

D2

_

INT

AL

GY

G

ND_

S

C

5

5

1

0u

F

L

D

O

5

P

0

D4

D

2

4V

0

L1

B

2L

P

1

2

1/16W/0402

0.25W/0603

VR

EC

T

D

1

5

D

2

4V

0

L1

B

2L

P

1

2

R

2

88

4

7k

T

it

le

Siz

e

D

oc

u

m

en

N

um

b

er

R

ev

D

at

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he

e

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o

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<

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1

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Rx 

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1

W

e

dn

e

s

d

ay

J

ul

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 08

20

20

1/16W/0402

C

3

7

1

00

n

F

OPTIONAL :  XY Alignment

R

76

9

0

R

7

0

0

50V/0402

G

ND3

U1

P

9415-

R

AC

1

G2

A

C

1_

1

H1

A

C

1_

2

H2

BST

1

G1

C

O

M1

A1

C

MA

B1

AC

2

G5

A

C

2_

1

H4

A

C

2_

2

H5

BST

2

G6

C

O

M2

A6

C

MB

B6

VR

EC

T

F1

VR

EC

T

1

F2

VR

EC

T

2

F3

VR

EC

T

3

F4

VR

EC

T

4

F5

VR

EC

T

5

F6

PGND

C1

PGND

2

C6

PGND

3

J1

PGND

4

J2

PGND

5

J3

PGND

6

J4

PGND

7

J5

PGND

8

J6

L

D

O

1

P

8

D6

L

D

O

5

P

0

D1

VOU

T

E1

VOU

T

1

E2

VOU

T

2

E3

O

U

T_

S

E4

VOU

T

3

E5

VOU

T

4

E6

DEM

OD

G4

n

E

N

G3

OD

0

A3

OD

1

B3

OD

3

A4

OD

4

B4

OD

2

C3

GP1

A2

GP0

B2

PGND

1

C2

GP2

C5

PC

LAM

P

D3

GP3

D4

GP5

D2

GP6

D5

GP4

A5

A

C

1_

3

H3

A

C

2_

3

H6

EC

LAM

P_D

R

V

C4

1/16W/0402

1/16W/0402

TX Demodulation Components

50V/0402

1/16W/0402

SD

A_OD

1

C

5

3

1

0u

F

12,1/16W/0402

10V/0201

(Q factor Main)

C

52

1

uF

1/16W/0402

HW RX Q Factor Configuration Table Q30~Q78 (Default RXQ = FW)

* If both GP1 and GP3 are low(<0.2V), RXQ will use FW Configured value. 

>=Vmin  <Vmax  Q_Main  Q_Offset  Pup(R)  Pdown(R)

  0     0.20V    FW      +0         NP    47k       

0.20    0.55V    Q30     +1       100k    27k       

0.55    0.90V    Q40     +2       100k    68k      

0.90    1.25V    Q50     +4       100k   150k 

1.25    1.60V    Q60     +6        47k   180k

1.60    1.98V    Q70     +8        47k     NP 

IDTP9415-R TRx DEMO PCB V1.1

GP5

C

2

22

NP

NOTE  

[a] Thermistor component is chosen by customer to

     set the Input Voltage to GP2 (C5). Intended for

     coil temperature.

[b] Component's maximum power rating  and value are

     based on under 15W power condition.

AL

GY

_

OD

4

R

2

86

NP

C

3

8

1

0n

F

AL

GY

_

OD

4

G

RE

EN

C

5

4

1

0u

F

1/16W/0402

L

D

O

1

P

8

25V/0603

C

5

6

0

.1

uF

SDA_OD

1

C

22

4

NP

1/16W/0402

C1

0

.1

uF

VR

EC

T

1/16W/0402

PGOOD

10V/0402

50V/0402

10V/0201

J5

CO

N2

1

2

3

4

5

6

GPIO MAP

0D0/OD1 - I2C SCL/SDA

OD2 - /INT

OD3 - ALGX

OD4 - ALGY

GP0 - PWR GOOD(H active,OUT)

GP1 - Q Main ( FW or ext HW )

GP2 - Thermistor ADC

GP3 - Q Offset ( FW or ext HW)

GP4 - I2C ADDR SEL( L:0x3B, H:0x3F)

GP5 - INHIBIT (H active,IN )

GP6 - EPP DISABLE(H active,IN)

C

45

4

.7

uF

G

ND2

ADVANCED INFORMATION

SUBJECT TO CHANGE

C

3

9

2

2n

F

R

2

91

1

00

k

PG

R1

NP

1/16W/0402

L

D

O

5

P

0

25V/0603

AC

2

(GP6 EPP DISABLE)

AP_PW

R

L

D

O

1

P

8

D9

1.8

V

L

D

O

1

P

8

T

XV

IN

R

1

0

4

7k

R

4

7

4

7

GP4

50V/0402

C

18

0

.1

uF

47,0.25W/0603

GP2

C

2

21

NP

25V/0201

GN

D

R

2

93

1

0k

D

1

6

1

N

4

4

48

H

LP

-7

25V/0603

R

2

75

NP

INHI

B

IT

R

6

1

5

.1

k

1/16W/0402

R

2

87

NP

C

2

5

3

.3

nF

G

ND5

D

1

8

L

E

D

0

60

3

_d

io

de

1/16W/0402

C

4

8

1

00

n

F

R3

NP

0.5W/0805

C

42

1

0u

F

50V/0402

10V/0402

1/16W/0402

O

D2

_

INT

C

4

7

2

2n

F

10V/0201

R

5

2

1

0k

R

7

71

4

7k

1/16W/0402

AlignX PCB coil

S

C

L_

O

D

0

R

4

6

4

7

AL

GX

AC

1

10k,1/16W/0402

C

3

3

1

00

n

F

Summary of Contents for P9415-R-EVK

Page 1: ...x Operation 5 4 5 Kit Hardware Connections for Wattshare Tx mode 6 4 5 1 Start Guide for Wattshare Tx mode Operation 6 4 5 2 WattshareTM Tx Mode Input Voltage 8 5 P9415 R Evaluation Board Test Point a...

Page 2: ...arameters in Transmitter Mode 20 13 I2C Function 20 14 P9415 R TRX Demo PCB v1 1 Schematic 21 15 Bill of Materials P9415 R EVK Demo Board Rev1 1 22 16 P9415 R EVK PCB Layout 23 17 Ordering Information...

Page 3: ...Coil 3 Overview The P9415 R EVK Wireless Power Evaluation Board serves to demonstrate the features and performance of the 9415 R 15W Wireless Power Receiver with WattShare mode Renesas P9243 GB EVK Ev...

Page 4: ...9415 R Wireless Power Pro GUI and USB drivers from the Renesas website The Window GUI software provides an intuitive graphical user interface for reading and writing to P9415 R registers and program c...

Page 5: ...oth kits are illuminated indicating that power transfer has been established Figure 2 Evaluation Kit Connections for Rx Mode Test 1 4 4 1 Start Guide for Rx Operation Place the bottom side of P9415 R...

Page 6: ...nections for Rx Mode Test 2 4 5 1 Start Guide for Wattshare Tx mode Operation The P9415 R EVK can be configured as a wireless power transmitter The device uses an on chip full half bridge inverter a P...

Page 7: ...ct Rx device and start power transfer right after WPC ID and Configuration packet Probe Rx VRECT and Rx VOUT and check if charging is functional Figure 5 TRx Mode Rx Charging Waveform 5 TRx default di...

Page 8: ...5 P9415 R Evaluation Board Test Point and Connector There are many test points placed around P9415 R EVK PCB board that can be used for quick and easy evaluation of P9415 R performance VOUT VRECT and...

Page 9: ...parameters for custom applications Default values of the P9415 R operating parameters such as output voltage FOD parameters and current limit are set in the firmware programmed into the internal multi...

Page 10: ...R Wireless Power Pro GUI tool are installed successfully in PC 2 Place P9415 R EVK on WPC TX or apply 5V DC from GND connection to the VOUT test point without Tx 3 Connect WPD USB DONGLE to J1 of P941...

Page 11: ...P9415 R EVK Evaluation Kit R16UH0015EU0100 Rev 1 0 May 27 2021 Page 11 Figure 10 Initial Screen of P9415 R GUI Figure 11 Successful Connection GUI Screen...

Page 12: ...P9415 R EVK 2 Configuration Table With table Rx BPP Rx EPP and Tx operation parameters can be read and saved in internal MTP memory after modification Place P9415 R on Tx pad to make it powered on or...

Page 13: ...parameters in running Rx mode Rx BPP and EPP mode may have different FOD parameters You can change FOD parameter values during running FOD test New value will be applied immediately Note that paramet...

Page 14: ...rite 2byte data 0x01 and 0xCF into register address 0x0071 please type in regWrite 0071 2 01 CF in blank command block and click Send cmd button then GUI will display write result on window Figure 15...

Page 15: ...must be connected to the PCLAMP pin at all times during Rx mode operation For greater than 5W operation the VRECT node is connected to the PCLAMP pin using a 50 to 100 resistor with greater than 1 4W...

Page 16: ...mo board OD1 can operate up to 5V 11 3 OD2 INT Pin The OD2 pin is set as a digital function open drain structure It is assigned as the INT signal for interrupt notification to the AP INT pin indicates...

Page 17: ...mbination If both GP1 and GP3 are low 0 2V the P9415 R reports the default value programmed in the firmware Q is 30 in the default configuration and can be changed with a P9415 R Wireless Power Pro GU...

Page 18: ...w the Rx mode is enabled Pulling the INHIBIT pin high will prevent the P9415 R from connecting to the transmitter The AP can use this pin to safely enable and disable wireless power transfer function...

Page 19: ...ower and accounts for all known losses it can thereby detect foreign objects because they cause an unknown loss The WPC specification requires that a power receiver must report to the power transmitte...

Page 20: ...tinuously calculate the difference between its measured transmitted power and RPP packet information received from the receiver If the difference is higher than the FOD threshold the P9415 R presumes...

Page 21: ..._1 H1 AC1_2 H2 BST1 G1 COM1 A1 CMA B1 AC2 G5 AC2_1 H4 AC2_2 H5 BST2 G6 COM2 A6 CMB B6 VRECT F1 VRECT1 F2 VRECT2 F3 VRECT3 F4 VRECT4 F5 VRECT5 F6 PGND C1 PGND2 C6 PGND3 J1 PGND4 J2 PGND5 J3 PGND6 J4 PG...

Page 22: ...P9415 R EVK Evaluation Kit R16UH0015EU0100 Rev 1 0 May 27 2021 Page 22 15 Bill of Materials P9415 R EVK Demo Board Rev1 1...

Page 23: ...P9415 R EVK Evaluation Kit R16UH0015EU0100 Rev 1 0 May 27 2021 Page 23 16 P9415 R EVK PCB Layout Figure 19 Top Layer Figure 20 Layer2 GND Layer Figure 21 Layer4 POWER Signal GND Layer...

Page 24: ...P9415 R EVK Evaluation Kit R16UH0015EU0100 Rev 1 0 May 27 2021 Page 24 Figure 22 Bottom Layer Figure 23 Top Silkscreen Layer...

Page 25: ...t Number Description P9415 R EVK P9415 R Evaluation board WPD USB DONGLE USB to I2C don required to connect with P9415 R Windows GUI It is not included in the P9415 R EVK evaluation kit and needs to b...

Page 26: ...00 Customer code 0x00 default Table 11 CustomerID Register 0x04 Address and Bit Register Field Name R W Default Value Function and Description 0x04 15 0 CustomerID R 0x0000 CustomerID Table 12 Project...

Page 27: ...self cleared to 0 by M0 afterward 0x2A 5 ADTRCVD R W 0 AP writes 1 to clear the corresponding Interrupt Registers bit This bit is self cleared to 0 by M0 afterward 0x2A 4 ADTSENT R W 0 AP writes 1 to...

Page 28: ...it This bit is self cleared to 0 by M0 afterward Note The bit definition in Rx mode and Tx mode is different Table 20 System Interrupt Clear Register 0x28 0x29 0x2A 0x2B in Tx Mode Address and Bit Reg...

Page 29: ...is generated on SET event 0x2E 1 0 Reserved R 0 Reserved 0x2D 7 VSWITCHFAILED R 0 1 Indicates the voltage switch command is failed 0x2D 6 SLEEPMODE R 0 1 Indicates the Rx is in sleep mode 0x2D 5 IDAU...

Page 30: ...and Tx mode is different Table 23 System Interrupt Register 0x30 0x31 0x32 0x33 in Rx Mode Address and Bit Register Field Name R W Default Value Function and Description 0x33 7 0 Reserved R 0 Reserve...

Page 31: ...icates the LDO is disabled 0 No such condition 0x30 6 LDOENABLE R 0 1 Indicates the LDO is enabled 0 No such condition 0x30 5 MODECHHGED R 0 1 Indicates the work mode of P9415 is changed 0 No such con...

Page 32: ...ition 0x30 0 EPT_TYPE_INT R 0 1 Indicates error is met and recommend AP to remove power in this case 0 No such condition Note The bit definition in Rx mode and Tx mode is different Table 25 System Int...

Page 33: ...pt is enabled 0 Corresponding interrupt is disabled 0x34 7 LDODISABLE R W 1 1 Corresponding interrupt is enabled 0 Corresponding interrupt is disabled 0x34 6 LDOENABLE R W 1 1 Corresponding interrupt...

Page 34: ..._SS_INT R W 0 1 Corresponding interrupt is enabled 0 Corresponding interrupt is disabled 0x34 1 START_DPING_INT R W 1 1 Corresponding interrupt is enabled 0 Corresponding interrupt is disabled 0x34 0...

Page 35: ...writes this register with the value intended to be sent as payload to the Charge Status Packet The FW does not verify or modify the value in any way A WPC End of Power Transfer packet message will be...

Page 36: ...Table 36 Die Temperature Register 0x46 Address and Bit Register Field Name R W Default Value Function and Description 0x46 15 0 DieTemp R 12bit of current Die Temperature ADC value Formula converting...

Page 37: ...communication P9415 clears the bit after processing the command 0x4F 0 SOFTRESTART W 0 AP sets 1 to restart P9415 P9415 clears the bit after processing the command 0x4E 7 VSWITCH W 0 AP sets 1 to sen...

Page 38: ...ficients for Power Region 1 Offset settings 0x6C 7 0 GAIN_2 R W FOD coefficients for Power Region 2 Gain slope settings 0x6D 7 0 OFFSET_2 R W FOD coefficients for Power Region 2 Offset settings 0x6E 7...

Page 39: ...power transfer packet has been received 0 No such error Table 46 System Command Register 0x76 Address and Bit Register Field Name R W Default Value Function and Description 0x77 7 0 Reserved W 0 Rese...

Page 40: ...e R W Default Value Function and Description 0xAA 15 0 fodThdH R W 0xFF9C FOD threshold for high level segment in Tx mode value in mW Table 51 FOD Segment Threshold Register in Tx Mode 0xAC Address an...

Page 41: ...eived from Tx Table 56 Read Data Register for WPC 1 3 0x196 Address and Bit Register Field Name R W Default Value Function and Description 0x196 15 0 ccRdSize R 0 Length of the raw data received from...

Page 42: ...P9415 R EVK Evaluation Kit R16UH0015EU0100 Rev 1 0 May 27 2021 Page 42 Appendix B Wireless Power Coil Key Specifications from Luxshare ICTR QS5858031L MW034...

Page 43: ...P9415 R EVK Evaluation Kit R16UH0015EU0100 Rev 1 0 May 27 2021 Page 43...

Page 44: ...e intended for developers skilled in the art designing with Renesas products You are solely responsible for 1 selecting the appropriate products for your application 2 designing validating and testing...

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