Renesas H8S/2268 Series, Supplementary Information, Page: 15 / 37

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Figures
Figure 2.1 Default User System Interface Circuit...................................................................... 5
Figure 2.2 User System Interface Circuit for MD2, MD1, and NMI.......................................... 5
Figure 2.3 User System Interface Circuit for RESET................................................................ 5
Figure 2.4 User System Interface Circuit for AN0-AN9, SEG1-SEG40, C1, C2,
COM1-COM4, TONED, V1-V3, AVcc, AVss and Vref Signals............................. 6
Figure 3.1 Enable automatic re-execution from interrupt break Check Box ............................. 9
Figure 3.2 Emulator Processing Flow When an Interrupt Occurs in the Watch Mode or
the Software Standby Mode...................................................................................... 10
Tables
Table 1.1 Environment Conditions........................................................................................... 1
Table 1.2 H8S/2268 Series MCU and User System Interface Cable ........................................ 2
Table 1.3 Operating Voltage and Frequency Specifications..................................................... 2
Table 1.4 Clock Selections ....................................................................................................... 3
Table 4.1 Address Area Parameters.......................................................................................... 11
Table 4.2 Access Status Parameters.......................................................................................... 12
Table 4.3 I/O Modules.............................................................................................................. 13