Racal Instruments AN/TRC-207, Operation And Maintenance Instructions

Page: 52 / 102

TO 31R2-2TRC207-1
5-4
c. Data path - The data path is made up of two slicer circuits (one for each radio) and a Field
Programmable Gate Array (FPGA). The purpose of the slicer circuits is to interpret the digital data
contained in the analog radio frequency (RF) signals by monitoring the positive and negative signal
peaks. The FPGA sends interrupts to the DSP when digital data is received and transfers the digital
data to the DSP.
d. Digital signal processor (DSP) - The DSP is the brain of the control CCA. Whenever the BDR is
powered up, or the position of the mode switch is changed, the DSP checks the identity (frequency
band) of the radio in the Radio A sleeve, and adjusts the gain control to match the frequency band
found. It continuously monitors the radio squelch line to determine when either radio begins receiving
incoming traffic. When squelch is lifted (signal received) on either radio, the DSP recognizes which
radio is receiving and signals the RF matrix CCA (A1A7) switches to route the transmit radio signal
through the RF amplifier. Encrypted traffic does not use CTCSS tones and will not lift squelch on a
radio programmed for CTCSS tones. To ensure that encrypted traffic is re-transmitted, the DSP
monitors the input from the data path. Even if squelch is not lifted, when a valid 12 or 16 kbps data
signal is received from the FPGA, the DSP recognizes which radio is receiving the data traffic and
signals the RF matrix CCA switches to route the transmit radio signal through the RF amplifier. When
the front panel mode switch is set to one of the COMMS positions, the DSP monitors the local Push-to-
Talk (PTT) line. When the PTT is keyed, the DSP recognizes which radio has been selected as the
transmit radio and sets the RF matrix CCA switches to route the transmit radio output through the RF
amplifier.
e. Combined clear/data output path - All output from the DSP, whether voice or data, follows the same
path. The digital output is converted from digital to analog. The analog signal is then amplified and
sent on all three available routes: radio A, radio B, and local audio (front panel audio connector). The
transmit circuits in the receiving radio are not active, so only the transmit radio will generate an RF
output. The local audio signal makes it possible to monitor all (unencrypted) through traffic.
5-4 15 WATT POWER AMPLIFIER ASSEMBLY (A1A6)
(See Figure 5-3.)As shown in Figure 5-3, the 15 watt power amplifier assembly (A1A6) consists of the following major
functions:
a. RF signal path and AMPKEY control - The RF signal path varies depending on whether the amplifier
is keyed on or not. When the amplifier is not keyed, diode CR7 is turned off and diode CR8 is turned
on. The received RF signal at J3 bypasses the power amplifier. When the amplifier is keyed, the input
signal at J2 is amplified through the RF power transistors Q1 and Q2 and transmitted.
b. Automatic level control (ALC) and RF detector (RF DET) - The ALC is used to reduce the RF output
power. Part of the ALC loop is the RF detector (RF DET), which monitors the transmitted RF signal
level. The ALC circuitry controls the power amplifier gain by varying the bias voltages of Q1 and Q2
in response to the RF DET voltage. This is done to maintain a flat RF output power response across
the frequency bands.
c. Manual level control MLC) - The MLC is used to manually control the gain of the power amplifier. It
is set during power amplifier calibration at the factory and does not require further adjustment.
d. Thermal protection (PATEMP) - The PATEMP circuit protects against thermal damage caused by the
power dissipated in Q1 and Q2. When the unit temperature reaches 90EC, the amplifier gain is
reduced.
e. Current limiting - The power amplifier is protected against damage caused by drawing high DC current.
R29 senses the drain current to Q1 and Q2. When the drain current reaches a preset level, the bias
voltage of Q1 and Q2 is reduced.
f. EEPROM - The EEPROM stores temperature-related calibration data which is used to adjust output
power levels by controlling the input ALC voltage.
g. Voltage regulators - Three voltage regulators are used to p5.2V(U3), +12V(U4), and +18V(U5)
to the control circuits in the power amplifier.
Section III. FUNCTIONAL OPERATION OF MECHANICAL ASSEMBLIES
Not Applicable.