PAC2514x Users Guide Preview
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Rev. 1.3 12 December 2023 © 2023 Qorvo US, Inc.
64 of 81
SOC.WWDTCTR
Register 8-45
.
SOC.WWDTCTR (Windowed Watchdog Timer Counter, SOC 0x43)
BIT
NAME
ACCESS
RESET
DESCRIPTION
7:0
CTR[7:0]
RW
0x0
WWDT Counter Value
SOC.WWDTCDV
Register 8-46
.
SOC.WWDTCDV (Windowed Watchdog Timer Count Down Value, SOC 0x44)
BIT
NAME
ACCESS
RESET
DESCRIPTION
7:0
CDV7:0]
RW
0x0
WWDT Count Down
Value
SOC.WWDTWIN
Register 8-47
.
SOC.WWDTWIN (Windowed Watchdog Timer Window, SOC 0x45)
BIT
NAME
ACCESS
RESET
DESCRIPTION
7:0
WINDOW[7:0]
RW
0x0
WWDT Window Value
- If WWDTRST is
written when CTR >=
WINDOW, then the
WWDT will issue a
device reset.
SOC.WWDTRST
Register 8-48
.
SOC.WWDTRST (Windowed Watchdog Timer Reset, SOC 0x46)
BIT
NAME
ACCESS
RESET
DESCRIPTION
7:0
RESET[7:0]
RW
0x0
WWDT Reset (Pet the
Dog / Feed the Dog)
- Write this register
with 0xAC o keep it
from resetting the
device.
- A Write of 0xAC will
reset the WWDT by
reloading the CDV
value into the CTR.
- If CTR >= WINDOW
when 0xAC is written,
then the WWDT shall
issue a device reset.
- If CTR counts down
to 0 before RESET is
written with 0xAC the
WWDT will issue a
device reset.
- This register shall
automatically be
cleared to 0x00, and
shall always read
0x00.
