BIOS Description
32
Manual for PlatiniX 1E series
Advanced Chipset Features Setup
Figure-5 Advanced Chipset Features Menu
The following indicates the options for each item and describes their meaning.
Item
Option
Description
l
DRAM Timing
By User
DRAM timing is defined by user.
Selectable
By SPD
DRAM timing is defined by SPD.
l
CAS Latency
1.5~3
Set CAS latency time.
Time
l
Active to Precharge
5,6,7
Set precharge delay time.
Delay
l
DRAM RAS# to
2,3
Set DRAM RAS# to CAS# delay 3 SCLKs or 2
CAS# Delay
SCLKs.
l
DRAM RAS#
2,3
Set DRAM RAS# precharge as 3 or 2.
Precharge
l
DRAM Data
ECC
This option allows you to select the Parity or ECC
Integrity Mode
Non-ECC
(Error-Checking and Correcting), according to the
type of installed DRAM.
l
Memory Frequency
Auto
Set Memory Frequency.
For
DDR200
DDR266
l
Dram Read
Enabled
Set Dram Read Thermal Management.
Thermal Mgmt
Disabled
l
System BIOS
Enabled
Besides conventional memory, the system BIOS
Cacheable
area is also cacheable.
Disabled
System BIOS area is not cacheable.
P1Een.p65
02-6-5, 16:27
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