Owner’s Reference
DirectStream DAC
©2014 PS Audio Inc. All rights reserved.
Introduction
15-061-01-1
4826 Sterling Drive, Boulder, CO 80301
Rev A
PH: 720.406.8946 [email protected] www.psaudio.com
Introduction
If the switch is too slow it won’t keep up with the 5.6MHz signal used in this instrument. If
the switch doesn’t react in consistent times it will introduce jitter. Use of traditional CMOS
gates adds a lot of jitter as do cross-coupled totem-poled bipolar transistors. Instead,
DirectStream relies on high speed differential video amps, which are essentially class A
switches, have their outputs either near the top rail or near the bottom power supply rail
(without ever saturating) and provide a very clean DSD switch.
For the all important low pass fi ltering requirements an active fi lter adds self noise even if it
is effectively lowering incoming noise. A unique and effective solution to this problem is a
passive fi lter. The design uses a carefully crafted high bandwidth audio transformer at the
output of the instrument for both galvanic isolation from the outside world as well as low
pass fi ltering.
The theory of operation, the fi rmware and the complex algorithms needed to execute a
design of this magnitude are daunting in their scale and scope. The actual hardware to
run the instrument is, perhaps, easier to grasp although no less critical to the perfected
performance.
Listed in this section are the highlights of the hardware, system’s overview and design
choices made to create an instrument of this caliber.
1. DirectStream runs from one master clock designed to
subtend all possible combinations of sub-clocks, from 44.1,
88.2, 48, 96, etc in order to eliminate the need for multiple
clocks that cause errors and problems associated when noise
from the unused clock propagates to the desired clock.
2. All sample rates supported are synchronously upsampled to 10x
the standard DSD sample rate and then back down to double
rate DSD (2 * 64 * 44.1kHz). There’s no need for other clocks to
interpret the inputs, no matter what their sample rate, because
of the instrument’s single clock architecture.
3. The path from the single master clock to its retiming fl ip-fl op
path is designed as short as possible and isolated from all other
clocking.
4. Connections between sections of the design have large
impedances, not only lots of power supply isolation, but also, for
example, 2k resistors in series with digital signals to slow down
the edges and lessen any noise transfer.
5. Similarly we run I
2
C, SPI and other control signals as slowly as
DirectStream
hardware and
design choices
One master
clock
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