PLX Technology PCI 9656RDK-LITE, Hardware Reference Manual

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PCI 9656RDK- LITE Hardware Reference Manual v1.4
6 © 2006 PLX Technology, Inc. All rights reserved.
Serial
EEPROM
Offset
Serial
EEPROM
Hex Value
Description Register Bits Affected
34h 5000 MSW of Local Base Address for Direct Master-to-PCI Memory DMLBAM[31:16]
36h 0000 LSW of Local Base Address for Direct Master-to-PCI Memory DMLBAM[15:0]
38h 4000
MSW of Processor/Local Bus Address for
Direct Master-to-PCI I/O Configuration
DMLBAI[31:16]
3Ah 0000
LSW of Processor/Local Bus Address for
Direct Master-to-PCI I/O Configuration
DMLBAI[15:0]
3Ch 0000 MSW of PCI Base Address (Re-map) for Direct Master-to-PCI DMPBAM[31:16]
3Eh 0000
LSW of Processor/Local Bus Address for
Direct Master-to-PCI Memory
DMPBAM[15:0]
40h 0000
MSW of PCI Configuration Address Register for
Direct Master-to-PCI I/O Configuration
DMCRGA[31:16]
42h 0000
LSW of PCI Configuration Address Register for
Direct Master-to-PCI I/O Configuration
DMCFGA[15:0]
Table 2-3. Extra Long Serial EEPROM Load Registers
Serial
EEPROM
Offset
Serial
EEPROM
Hex Value
Description Register Bits Affected
44h 9656 Subsystem ID PCISID[15:0]
46h 10B5 Subsystem Vendor ID PCISVID[15:0]
48h FFFE MSW of Range for PCI-to-Local Address Space 1 LAS1RR[31:16]
4Ah 0000 LSW of Range for PCI-to-Local Address Space 1 LAS1RR[15:0]
4Ch 0000
MSW of Local Base Address (Re-map) for
PCI-to-Local Address Space 1
LAS1BA[31:16]
4Eh 0001
LSW of Local Base Address (Re-map) for
PCI-to-Local Address Space 1
LAS1BA[15:0]
50h 0000
MSW of Bus Region Descriptors for
PCI-to-Local Address Space 1
LBRD1[31:16]
52h 01C3
LSW of Bus Region Descriptors for
PCI-to-Local Address Space 1
LBRD1[15:0]
54h 0000 Hot Swap Control/Status Register Reserved
56h 4C06
Hot Swap Control/Status Register /
Hot Swap Next Capability Pointer
HS_NEXT[7:0] / HS_CNTL[7:0]
58h 0000 Reserved Reserved
5Ah 0000 PCI Arbiter Control PCIARB[15:4] / PCIARB[3:0]
5Ch 7A02 Power Management Capabilities PMC[15:9,2:0]
5Eh 4801
Power Management Next Capability Pointer /
Power Management Capability ID
(the LSB is reserved)
PMNEXT[7:0] / PMCAPID[7:0]
60h 0000
Power Management Data /
PMCSR Bridge Support Extensions
(the LSB is reserved)
PMDATA[7:0]/ PMCSR_BSE[7:0]
62h 0000
Power Management Control/Status
(Bits 15, 7:2, and 1:0 are reserved)
PMCSR[15:0]