A
A
B
B
C
C
D
D
E
E
4
4
3
3
2
2
1
1
5VCC
RESET CKT
PCI 9656
J1: 64-Bit Universal PCI Edge Card Connector (3.3V/5V)
GND
Suggested Board Layout
DB9
LEDs
BGA
0.05" pitch
26X26
FLASH
32PLCC
CPLD
SYNC.
SRAM
1 1
1
Clock
OSC
SERIAL
EPROM
DC/DC
RS232 Interface
1
1
1
1
Clock Buffer
208/144/80-pin QFP
FP21-FP23
0.5mm pitch
84, 68, 44, 28 pin
PLCCs
U12
U11
S1
16-pin
SOIC
16-pin
SOIC
FP9
FP10
FP5
FP8
44-pin
TQFP
44-pin
TQFP
FP11
FP12
28-pi
n
SOIC
BGA
1.0mm pitch
25X25
FP13
FP14
48-pi
n
SSOP
48-pi
n
SSOP
240/176/100-pin QFP
FP15-FP17
0.5mm pitch
160/112-pin QFP
FP26-FP28
0.65mm pitch
30X25 0.1" c-c
Through hole
Prototype Area
FP29
FP30
54-pin
TSOP
54-pin
TSOP
JP1
208/144/80-pin QFP
FP18-FP20, 0.5mm pitch
on the back.
176/100-pin QFP,
FP24-FP25,
0.5mm pitch on
the back.
128-pin 0.4mm pitch
TQFP on the back.
RJ45 & USB
connectors
Note:
1. Control Signal Connector (LAH5)
2. Control Signal Connector (LAH6)
3. Data Bus Connector (LAH3)
4. Data Bus Connector (LAH4)
5. Address Bus Connector (LAH1)
6. Address Bus Connector (LAH2)
7. Marked as is prototyping area
U6
U14
U13
U1
LAH6
LAH5
LAH1
LAH2
LAH3
LAH4
U7-8
U9
U10
12.283"
5.20" max.
J
3
J
P
OM
Connector
0.295"
0.190"
3.362" between center
of two Tab holes
28-pin
SOIC
FP11
FP12
BGA1
3.3V
GND
3.3V
DC/DC
U2
BGA2
J2
91-0017-200-A
203
PLX TECHNOLOGY, INC.
870 Maude Ave, Sunnyvale, CA 94085
Custom
13
13
Monday, March 29, 2004
www.plxtech.com
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