PCI 9656RDK- LITE Hardware Reference Manual v1.4
© 2006 PLX Technology, Inc. All rights reserved.
5
2.4 Serial
EEPROM
A socketed 2 Kbit serial EEPROM (U10) is used in this RDK. It is connected directly to the PCI 9656 and
provides the configuration data to initialize the PCI 9656 after the system reset is removed. There are 100
bytes of pre-programmed configuration data in the serial EEPROM, which include device and functional
information for Plug-and-Play (PnP), PCI memory resource allocation, and initial values of internal
registers.
2.4.1
Serial EEPROM Contents
Table 2-2. Long Serial EEPROM Load Registers
Serial
EEPROM
Offset
Serial
EEPROM
Hex Value
Description
Register Bits Affected
0h 9601
Device
ID
PCIIDR[31:16]
2h 10B5
Vendor
ID
PCIIDR[15:0]
4h 0680
Class
Code
PCICCR[23:8]
6h
00BA
Class Code, Revision of the PCI 9656
PCICCR[7:0] / PCIREV[7:0]
8h
0000
Maximum Latency, Minimum Grant PCIMLR[7:0] / PCIMGR[7:0]
Ah
0100
Interrupt Pin, Interrupt Line Routing
PCIIPR[7:0] / PCIILR[7:0]
Ch
0000
MSW of Mailbox 0 (User Defined)
MBOX0[31:16]
Eh
0000
LSW of Mailbox 0 (User Defined)
MBOX0[15:0]
10h
0000
MSW of Mailbox 1 (User Defined)
MBOX1[31:16]
12h
0000
LSW of Mailbox 1 (User Defined)
MBOX1[15:0]
14h
FFFE
MSW of Range for PCI-to-Local Address Space 0
LAS0RR[31:16]
16h
0000
LSW of Range for PCI-to-Local Address Space 0
LAS0RR[15:0]
18h 0000
MSW of Local Base Address (Re-map) for
PCI-to-Local Address Space 0
LAS0BA[31:16]
1Ah 0001
LSW of Local Base Address (Re-map) for
PCI-to-Local Address Space 0
LAS0BA[15:0]
1Ch
0120
MSW of Mode/DMA Arbitration Register
MARBR[31:16]
1Eh
0000
LSW of Mode/DMA Arbitration Register
MARBR[15:0]
20h 2030
Local Miscellaneous Control Register 2 /
Serial EEPROM Write-Protected Address Boundary
LMISC2[7:0] /
PROT_AREA[7:0]
22h 8500
Local Miscellaneous Control Register 1 /
Processor/Local Bus Big/Little Endian Descriptor Register
LMISC1 [7:0] /
BIGEND [7:0]
24h
0000
MSW of Range for PCI-to-Local Expansion ROM
EROMRR[31:16]
26h
0000
LSW of Range for PCI-to-Local Expansion ROM
EROMRR[15:0]
28h 0000
MSW of Local Base Address (Re-map) for
PCI-to-Local Expansion ROM
EROMBA[31:16]
2Ah 0000
LSW of Local Base Address (Re-map) for
PCI-to-Local Expansion ROM
EROMBA[15:0]
2Ch 4343
MSW of Bus Region Descriptors for
PCI-to-Local Address Space 0 and Expansion ROM
LBRD0[31:16]
2Eh 00C3
LSW of Bus Region Descriptors for
PCI-to-Local Address Space 0 and Expansion ROM
LBRD0[15:0]
30h
0000
MSW of Range for Direct Master-to-PCI
DMRR[31:16]
32h
0000
LSW of Range for Direct Master-to-PCI
DMRR[15:0]
