Section 4
Hardware Architecture
4.12 Reset
Circuitry
4.12.1
Power-On Reset and Pushbutton Reset
The PCI Bus resets when the RST# signal is active during power-on. The PCI 9054 outputs
LRESETo# when RST# is active. All Local devices reset with the LRESETo#.
The on-board Pushbutton resets all Local devices, excluding the PCI 9054. The software must
reinitialize the PCI 9054 after all resets.
4.12.2 Register
Initialization
The PCI 9054 serial EEPROM contains all critical configuration data for normal PCI Bus
operations. These include PnP data, PCI memory resource allocation, and end of the PCI 9054
initializations (such as the Init Done bit). In addition to the serial EEPROM data, the Local
processor (MPC860 in this case) can reinitialize the PCI 9054, thereby overwriting the data from
the serial EEPROM. Refer to
PCI 9054 Data Book
and the following serial EEPROM data example
for more information.
PCI 9054RDK-860 Hardware Reference Manual v2.3
© 2005 PLX Technology, Inc. All rights reserved.
4-9
