PLX Technology PCI 9054RDK-860 Hardware Reference Manual Download

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PCI 9054RDK-860

Hardware Reference Manual

Summary of Contents for PCI 9054RDK-860

Page 1: ...PCI 9054RDK 860 Hardware Reference Manual...

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Page 3: ...PCI 9054RDK 860 Hardware Reference Manual Version 2 3 July 2005 Website http www plxtech com Technical Support http www plxtech com support Phone 408 774 9060 800 759 3735 Fax 408 774 2169...

Page 4: ...ons to this publication known as errata PLX assumes no liability whatsoever including infringement of any patent or copyright for sale and use of PLX products PLX Technology and the PLX logo are regis...

Page 5: ...iable for any errors incidental or consequential damages in connection with the furnishing performance or use of this manual or examples herein PLX assumes no responsibility for damage or loss resulti...

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Page 7: ...ternal Interrupt 4 7 4 8 3 PCI to Local interrupt 4 7 4 8 4 PCI Interrupt INTA via the PCI 9054 4 7 4 9 LED INDICATORS 4 7 4 10 POWER SUPPLY 4 7 4 11 MPC860 PERIPHERALS CONNECTOR POM2 4 8 4 12 RESET C...

Page 8: ...C1 6 1 6 2 SCC2 6 3 6 3 SCC3 6 4 6 4 SCC4 6 5 6 5 MISC 6 6 7 CUSTOMER SUPPORT 7 1 8 REFERENCES 8 1 9 BILL OF MATERIALS SCHEMATICS 9 1 LIST OF FIGURES FIGURE 3 1 PCI 9054RDK 860 SYSTEM ARCHITECTURE 3 1...

Page 9: ...TRANSMITTER 6 2 TABLE 6 7 UART 6 3 TABLE 6 8 HDLC 6 3 TABLE 6 9 TRANSPARENT CONTROLLER 6 3 TABLE 6 10 UART 6 4 TABLE 6 11 HDLC 6 4 TABLE 6 12 TRANSPARENT CONTROLLER 6 4 TABLE 6 13 UART 6 5 TABLE 6 14...

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Page 11: ...rket faster and more efficiently 1 1 Features The PCI 9054RDK 860 Rapid Development Kit contains a 12 35 L x 4 20 W circuit board with the following features PCI 9054 176 pin PQFP PCI v2 2 compliant C...

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Page 13: ...an empty PCI slot 6 Secure the captive screw to ensure proper electrical grounding and mechanical stability 2 2 Verify Installation After installation verify that the PCI 9054RDK 860 circuit board is...

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Page 15: ...860 features PCI 9054 PCI Bus Master Slave Interface chip MPC860 PowerPC CPU with communications processor Boot ROM FLASH Memory subsystem SDRAM Debug port serial port MPC860 JTAG and MPC860 developm...

Page 16: ...he DS access can access all MPC860 peripherals including the serial port SDRAM and FLASH The PCI 9054 DMA controller is the most efficient way to transfer data between the Local Bus and the PCI Bus In...

Page 17: ...sed 6FFF FFFF 6000 0000 Unused 5FFF FFFF 5000 0000 DM I O PCI 9054 NA 32 NA Direct Master I O space controlled by MPC860 GPCM 4FFF FFFF 4000 0000 DM Memory PCI 9054 NA 32 NA Direct Master Memory space...

Page 18: ...60 for CompactPCI RDK The PCI 9054 supports a standard Single cycle one Address phase per one Data phase and Burst cycle one Address phase for one or more Data phases as MPC860 and its peripherals are...

Page 19: ...addition to the TEA and the RETRY signals from the PCI 9054 4 4 Clock The MPC860 accepts the 4 MHz external clock MODCK 1 2 b11 or 50 MHz external clock MODCK 1 2 b10 and generates the CLKOUT to cloc...

Page 20: ...sable the clock signal for power down purposes CKE can be enabled or disabled by installing a resistor R16 or R23 respectively The CSSDRAM is connected to the SDRAM chip select programmable via the MP...

Page 21: ...Addressing mode CAS latency of two and Burst Read Write operation The MAR data is actually 88h because the address lines are shifted by two Least Significant Bits LSBs SDRAM A 0 is actually LA 2 due t...

Page 22: ...xeffefc04 0x0ffcfc04 0xeeefb004 0x00af3004 long 0xf0fff000 0xf0fff000 0xe0faf000 0x0ff0f000 long 0xfffff005 0xfffffc04 0xfffffc04 0xfffffc04 long 0xfffffc04 0xfffffc04 0xfffffc04 0xfffffc04 Single Wri...

Page 23: ...54 Doorbell or Mailbox registers The PCI 9054 interrupt output is connected to the MPC860 IRQ1 pin The PCI 9054 Local System error such as a PCI Master abort can generate TEA to the MPC860 Refer to th...

Page 24: ...49 29 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 59 24 25 26 27 28 5 6 7 1 2 3 4 51 52 53 54 55 56 57 58 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 9...

Page 25: ...Register Initialization The PCI 9054 serial EEPROM contains all critical configuration data for normal PCI Bus operations These include PnP data PCI memory resource allocation and end of the PCI 9054...

Page 26: ...iptor LMISC 7 0 BIGEND 7 0 24h 0000 MSW of Range for PCI to Local Expansion ROM EROMRR 31 16 26h 0000 LSW of Range for PCI to Local Expansion ROM EROMRR 15 0 28h 0000 MSW of Local Base Address Re map...

Page 27: ...LAS1RR 15 0 4Ch 0000 MSW of Local Base Address Remap for PCI to Local Address Space 1 LAS1BA 31 16 4Eh 0001 LSW of Local Base Address Remap for PCI to Local Address Space 1 LAS1BA 15 0 50h 0000 MSW of...

Page 28: ...is supplied and the clock returns with a smooth transition If power is removed the software must reconfigure the PCI 9054 4 15 Prototype Area The PCI 9054RDK 860 provides a prototype area that allows...

Page 29: ...nstall R38 and R41 if 50 MHz OSC is used R42 R43 D 5 state during power on If R42 is installed D 5 1 boot port size is 8 bit default R70 R71 D 7 state during power on If R70 is installed D 7 1 initial...

Page 30: ...llowing when using the PCI 9054RDK 860 BDIP is generated only if the BTERM bit is reset 0 Therefore if more than four Lwords are needed use the BURST signal instead of BDIP to terminate the Burst sequ...

Page 31: ...X 5 1 1 PLXMon Uses PCI SDK PLXMon is used on the Host Bus PC PLXMon runs from FLASH memory on the Local Bus 5 1 2 Windows Device Drivers Drivers that use the API library are available from PLX Techno...

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Page 33: ...ock for SCC N19 PB 19 RTS1 Request to send modem line for SCC1 J19 PC 11 CTS1 Clear to send modem line for SCC1 K19 PC 10 CD1 Carrier detect modem line for SCC1 Table 6 3 Transparent Controller MPC860...

Page 34: ...acknowledge 2 1 Ethernet CAM interface signal K3 J1 J2 H1 IP_B 6 ALE_B IP_B 2 IP_B 7 AT0 AT3 Address type 0 3 1 CPM transaction initiator 0 CPU transaction initiator C17 PB 31 REJECT1 SCC1 CAM interfa...

Page 35: ...r SCC2 D18 PC 14 RTS2 Request to send modem line for SCC2 L18 PC 9 CTS2 Clear to send modem line for SCC2 M18 PC 8 CD2 Carrier detect modem line for SCC2 M17 PA 6 CLK2 Input clock for SCC Table 6 9 Tr...

Page 36: ...e data input for SCC3 T15 PD 7 RTS3 Request to send modem line for SCC3 M16 PC 7 CTS3 Clear to send modem line for SCC3 R19 PC 6 CD3 Carrier detect modem line for SCC3 M18 PC 8 CLK3 Clock for SCC Tabl...

Page 37: ...PD 9 RXD4 Receive data input for SCC4 V16 PD 6 RTS4 Request to send modem line for SCC4 T18 PC 5 CTS4 Clear to send modem line for SCC4 T17 PC 4 CD4 Carrier detect modem line for SCC4 P19 PA 4 CLK4 Cl...

Page 38: ...L1RSYNCA Receive sync input for serial interface TDM Port A U17 PD 15 L1TSYNCA Input transmit data sync to TDM Channel A R16 PD 12 L1RSYNCB Receive sync input for serial interface TDM Port B V18 PD 13...

Page 39: ...ended design PLX PCI chip Processor Local Operating System and version if any I O Description of problem and steps to recreate the problem if reporting a problem You may contact PLX Customer Support a...

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Page 41: ...orola MPC860 Data Book 3 PCI SIG PCI Specification Rev 2 1 and 2 2 4 Motorola SDRAM Data Sheet 5 I2O Special Interest Group Intelligent I O I2O Architecture Specification Revision 1 5 PCI 9054RDK 860...

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Page 43: ...0805 Digikey C28 9 4 Kemet T491A104K035AS 0 1uF 35V Tantalum Capacitor SMT A Case Electrosonic C80 C82 C83 C84 10 1 Agilent Tech HSMG C650 GREEN_LED SMT Newark D1 11 1 Agilent Tech HSMS C650 RED_LED...

Page 44: ...B3S 1002 Tactile Pushbutton Switch SMT 4 Pin 4 2x9 0mmm Digikey SW1 43 1 PLX PCI 9054 AC50PI PLX PCI9054 Bridge Chip PQFP 176 Pin PLX U1 45 1 Motorola XPC860MHZP50C1 Motorola MPC860 50Mhz BGA 357 Pin...

Page 45: ...ufacture Manufacture Part Number Description Package Type Source Part Reference 1 1 Velostat 2100R 7X15 7 X 15 Antistatic Bag N A FAI BAG1 2 1 Serial cable 25 pin Female to 9 pin Female null modem N A...

Page 46: ...chematics The following are the PCI 9054RDK 860 circuit board schematics Note Page 5 of 11 of the schematics is intentionally omitted 9 4 PCI 9054RDK 860 Hardware Reference Manual v2 3 2005 PLX Techno...

Page 47: ...8 08 98 1 Removed SRAM Lattice and SRAMs 2 Changed R5 to 1K EEDI O pull down R 3 Added Pull Up Resistor 510 ohm for BB 4 Added Pull Down Resistor for TCK and TRST 1K ohm 5 Fixed SDRAM address MUX unit...

Page 48: ...36 144 166 169 7 171 155 142 157 160 156 152 143 94 93 92 91 146 159 52 167 10 154 62 53 173 174 175 2 3 4 14 15 31 32 33 34 36 37 38 39 40 42 43 46 47 48 49 50 51 5 35 28 89 115 99 45 70 19 109 116 2...

Page 49: ...GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND CLK8 TOUT4 L1TCLKB PA0 CLK7 TIN4 BRGO4 PA1 CLK6 TOUT3 L1RCLKB BRGCLK2 PA2 CLK5 TIN3 BRGOUT3 PA3 CLK4 TOUT2 PA4 CLK3 TIN2 L1TCLKA BRGOUT2 PA...

Page 50: ...DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 BA0 BA1 CS RAS CAS WE DQMH DQM CLK CKE VCC0 VCC1 VCC2 VCCQ0 VCCQ1 VCCQ2 VCCQ3 VSS0 VSS1 VSS2 VSSQ0 VSSQ1 VSSQ2 VSSQ3 NC0 NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8 NC9 DQML U6 K4S6408...

Page 51: ...08 3 103 J XX 1 2 3 4 5 6 7 8 RN28 742 08 3 103 J XX 1 2 3 4 5 6 7 8 RN31 742 08 3 103 J XX 1 2 3 4 5 6 7 8 RN34 742 08 3 103 J XX 1 2 3 4 5 6 7 8 RN37 742 08 3 103 J XX 1 2 3 4 5 6 7 8 RN40 742 08 3...

Page 52: ...0 0K180 C48 0 1uF 1 2 C46 10uF 1 2 R47 0K0 R48 0K0 C49 10uF 1 2 C54 0 1uF 1 2 C50 10uF 1 2 C55 0 1uF 1 2 C51 10uF 1 2 C56 0 1uF 1 2 C57 0 1uF 1 2 C52 10uF 1 2 C53 10uF 1 2 C58 0 1uF 1 2 J6 PCICONUNV A...

Page 53: ...2 R53 0K0 R54 0K0 C69 10uF 1 2 R36 10K 1 2 U20 MAX6306UK30D1 T 5 3 1 2 4 VCC MR RESET GND RST_IN R37 10K 1 2 SW1 SW PUSHBUTTON J7 POM2 30 31 32 33 34 35 36 37 38 39 40 41 50 42 43 44 45 46 47 48 49 2...

Page 54: ...17 18 19 20 21 22 FP6 20 Pin SOIC Footprint 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 FP5 20 Pin SOIC Footprint 1 2 3 4 5 6 7 8 9 10 20 19 1...

Page 55: ...A TP184 VIA TP175 VIA TP161 VIA TP189 VIA TP194 VIA TP149 VIA TP145 VIA TP153 VIA TP156 VIA TP126 VIA TP137 VIA TP122 VIA TP131 VIA TP134 VIA TP109 VIA TP102 VIA TP92 VIA TP95 VIA TP106 VIA TP112 VIA...

Page 56: ...r 3 3V 5V GND CONTROL SIGNAL CONNECTOR FLASH POWER SUPPLY MPC860 Prototype Area 91 0002 300 A 300 LAYOUT PLX TECHNOLOGY 870 Maude Ave Sunnyvale CA 94085 Custom 11 11 Friday July 12 2002 WWW PLXTECH CO...

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