VSX-AX4AVi-S
260
1
2
3
4
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2
3
4
C
D
F
A
B
E
No. Pin Name
I/O
Function
No. Pin Name
I/O
Function
21
P10
I
Video pixel input port
61
CAPY1
I
ADC capacitor network
22
P9
O
Video pixel output port
62
CAPY2
I
ADC capacitor network
23
P8
O
Video pixel output port
63
AVDD
−
Analog supply voltage (3.3V)
24
P27
I/O
Video pixel input/output port
64
REFOUT
O
Internal voltage reference output
25
P7
O
Video pixel output port
65
CML
O
Common-mode level pin for the internal ADCs
26
P6
O
Video pixel output port
66
AGND
−
Analog ground
27
P5
O
Video pixel output port
67
BIAS
O
External bias setting
28
P4
O
Video pixel output port
68
CAPC1
I
ADC capacitor network
29
P26
I/O
Video pixel input/output port
69
CAPC2
I
ADC capacitor network
30
P25
I/O
Video pixel input/output port
70
AGND
−
Analog ground
31
P24
I/O
Video pixel input/output port
71
AIN10
I
Analog video input channel
32
P23
I/O
Video pixel input/output port
72
AIN4
I
Analog video input channel
33
P22
I/O
Video pixel input/output port
73
AIN11
I
Analog video input channel
34
P21
I
Video pixel input port
74
AIN5
I
Analog video input channel
35
DCLK_IN
I
Clock input signal
75
AIN12
I
Analog video input channel
36
LLC1
O
Line-locked output clock for the pixel data output
76
AIN6
I
Analog video input channel
37
XTAL1
O
27MHz crystal connect pin
77
SOY
I
Sync on luma input
38
XTAL
I
Input pin for 27MHz crystal
78
RESET
I
System reset input
39
DVDD
−
Digital core supply voltage (1.8V)
79
DE_IN
I
Data enable input signal
40
DGND
−
Digital ground
80
ALSB
I
Selects the I2C address for the
ADV7400A control and VBI readback port
41
P3
O
Video pixel output port
81
SDA1
I/O
I2C port serial data input/output
42
P2
O
Video pixel output port
82
SCLK1
I
I2C port serial clock input (max 400kHz)
43
P1
I
Video pixel input port
83
P40
I
Video pixel input port
44
P0
I
Video pixel input port
84
P39
I
Video pixel input port
45
P20
I
Video pixel input port
85
VS_IN
I
VS input signal
46
ELPF
O
The recommend external loop filter must
be connected to this pin
86
HS_IN/CS_IN
I
Can be configured in CP mode to be
either a digital HS input signal or a digital
CS input signal used to extract timing in
5-wire or 4-wire RGB mode.
47
PVDD
−
PLL supply voltage (1.8V)
87
P38
I
Video pixel input port
48
PVDD
−
PLL supply voltage (1.8V)
88
P37
I
Video pixel input port
49
AGND
−
Analog ground
89
DGND
−
Digital ground
50
AGND
−
Analog ground
90
DVDD
−
Digital core supply voltage (1.8V)
51
AGND
−
Analog ground
91
P19
O
Video pixel output port
52
SOG
I
Sync on green input
92
P18
O
Video pixel output port
53
AIN7
I
Analog video input channel
93
P17
O
Video pixel output port
54
AIN1
I
Analog video input channel
94
P16
O
Video pixel output port
55
AIN8
I
Analog video input channel
95
P36
I
Video pixel input port
56
AIN2
I
Analog video input channel
96
P35
I
Video pixel input port
57
AIN9
I
Analog video input channel
97
P34
I
Video pixel input port
58
AIN3
I
Analog video input channel
98
FIELD/DE
O
Field sync signal output/data enable
59
NC
−
No connect pin
99
VS
O
Vertical sync output signal
60
AGND
−
Analog ground
100
P33
I
Video pixel input port
