SX-SW77
58
1
2
3
4
1
2
3
4
C
D
F
A
B
E
GND
1
GND
56
GND
2
GVDD
55
GREG
3
BST_A
54
DVDD
4
PVDD_A
53
GND
5
PVDD_A
52
DGND
6
OUT_A
51
GND
7
OUT_A
50
PWM_AP
8
GND
49
PWM_AM
9
GND
48
RESET_AB
10
OUT_B
47
PWM_BM
11
OUT_B
46
PWM_BP
12
PVDD_B
45
DREG
13
PVDD_B
44
M1
14
BST_B
43
M2
15
BST_C
42
M3
16
PVDD_C
41
DREG_RTN
17
PVDD_C
40
PWM_CP
18
OUT_C
39
PWM_CM
19
OUT_C
38
RESET_CD
20
GND
37
PWM_DM
21
GND
36
PWM_DP
22
OUT_D
35
SD_AB
23
OUT_D
34
SD_CD
24
PVDD_D
33
OTW
25
PVDD_D
32
GREG
26
BST_D
31
GND
27
GVDD
30
GND
28
GND
29
TAS5122ADCA (MAIN ASSY : IC3201, IC3301, IC3401)
• 50W Stereo Digital Amplifier
Pin Arrangement (Top view)
PWM
Receiver
Timing
Control
Gate
Drive
Protection A
Gate
Drive
Gate
Drive
Gate
Drive
GREG
GREG
GREG
GREG
GREG
DREG
To Protection
Blocks
DREG
Protection B
10
8
RESET_AB
PWM_AP
54
BST_A
49
GND
PWM
Receiver
OT
Protection
UVP
Timing
Control
12
PWM_BP
25
OTW
Block Diagram
23
SD_AB
24
SD_CD
48
GND
13
DREG
26
GREG
30
GVDD
17
DREG_RTN
43
BST_B
PWM
Receiver
Timing
Control
Gate
Drive
Protection C
Gate
Drive
Gate
Drive
Gate
Drive
GREG
GREG
Protection D
20
18
RESET_CD
PWM_CP
42
BST_C
37
GND
PWM
Receiver
Timing
Control
22
PWM_DP
OUT_D
36
GND
31
BST_D
34,35
PVDD_D
32,33
38,39
PVDD_C
OUT_C
40,41
50,51
PVDD_A
OUT_A
52,53
46,47
PVDD_B
OUT_B
44,45