SX-SW77
63
5
6
7
8
5
6
7
8
C
D
F
A
B
E
CS 1
VCC
8
SK 2
NC
7
DI 3
NC
6
DO 4
GND
5
No.
Pin Name
I/O
Pin Function
1
CS
I
Chip select input
2
SK
I
Serial clock input
3
DI
I
Start bit, OP code, address and serial data inputs
4
DO
O
Serial data output and READY/BUSY internal state display output
5
GND
−
Ground
6
NC
−
Non connection
7
NC
−
Non connection
8
VCC
−
Power supply
BR93L46RFJ-W (MAIN ASSY : IC5503)
• 64
×
16 bit EEPROM
Pin Arrangement (Top view)
Pin Function
CS
Instruction
Register
1
SK
2
DI
Address
Buffer
Writing
Prohibition
High Voltage
Generation
Power Supply
Voltage Detection
Data
Register
6 bit
16 bit
R/W
Amp.
Dummy Bit
3
Instruction
Decode
Control Clock
Generation
Block Diagram
6
bit
16 bit
DO
4
Address
Decoder
1,024 bit
EEPROM
