2004 Mar 01
64
Philips Semiconductors
Product specification
Digital video encoder
SAA7102; SAA7103
11 CHARACTERISTICS
V
DDD
= 3.0 to 3.6 V; T
amb
= 0 to 70
°
C (typical values excluded); unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supplies
V
DDA
analog supply voltage
3.15
3.3
3.45
V
V
DDD
digital supply voltage
3.0
3.3
3.6
V
I
DDA
analog supply current
note 1
1
110
140
mA
I
DDD
digital supply current
note 2
1
70
90
mA
Inputs
V
IL
LOW-level input voltage at all digital
input pins except pins SDA and SCL
−
0.5
−
+0.8
V
V
IH
HIGH-level input voltage at all digital
input pins except pins SDA and SCL
2.0
−
V
DDD
+ 0.3
V
I
LI
input leakage current
−
−
10
µ
A
C
i
input capacitance
clocks
−
−
10
pF
data
−
−
8
pF
I/Os at
high-impedance
−
−
8
pF
Outputs; all digital output pins except pin SDA
V
OL
LOW-level output voltage
I
OL
= 2 mA
−
−
0.4
V
V
OH
HIGH-level output voltage
I
OH
=
−
2 mA
2.4
−
−
V
I
2
C-bus; pins SDA and SCL
V
IL
LOW-level input voltage
−
0.5
−
0.3V
DDD
V
V
IH
HIGH-level input voltage
0.7V
DDD
−
V
DDD
+ 0.3
V
I
i
input current
V
i
= LOW or HIGH
−
10
−
+10
µ
A
V
OL
LOW-level output voltage (pin SDA)
I
OL
= 3 mA
−
−
0.4
V
I
o
output current
during acknowledge
3
−
−
mA
Clock timing; pins PIXCLKI and PIXCLKO
T
PIXCLK
cycle time
note 3
22.5
−
100
ns
t
d(CLKD)
delay from PIXCLKO to PIXCLKI
note 4
−
−
−
ns
δ
duty factor t
HIGH
/T
PIXCLK
note 3
40
50
60
%
duty factor t
HIGH
/T
CLKO2
output
40
50
60
%
t
r
rise time
note 3
−
−
3
ns
t
f
fall time
note 3
−
−
3
ns
Input timing
t
SU;DAT
input data set-up time
5
−
−
ns
t
HD;DAT
input data hold time
0
−
−
ns
Crystal oscillator
f
nom
nominal frequency
−
27
−
MHz
∆
f/f
nom
permissible deviation of nominal
frequency
note 5
−
50
−
+50
10
−
6
