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MG5.1E

6. SMALL SIGNAL PANEL

45

6.6 HIP, I/O select, Video processing

Personal notes

Figure 6-9

CL 86532047_019.eps

051098

Ext 1

read_status 1

Tuner

TOPIC

FBX

PROC

IF

GD

rgb2

FBL2

FBL1

rgb1

CVBS main

Main

7501/TDA9320H

C

Y

TXT

HIP

PIP

C

Y

C

Y

(Easylink)

Easylink

front_ detect

IIC

OTC

Ext 2

read_status 2

Ext 3

Front

HOP

proc

COMB

Peaking

set_rgb_main

Comb control

Interface

Video processing

In the HIP there is video identification but this is not used. The
sandcastle-pulse of the HIP will not be used for
synchronisation. The HOP will generate synchronisation signal
derived from the feature box-(Picnic)signals. If a VCR is
connected, there is also an automatic correction for
macrovision. This is active for the external sources and the
presets 0, 90-99. The Y/C switch in the HIP is controlled by the
HIP itself (no external voltage). When a PAL- or NTSC-signal is
received then the Y/C from the combfilter will be used and when
SECAM is received, this will be processed internally. The comb
filter has to be switched for PAL/NTSC by two lines: SYS1/
SYS2 (pin 25 and 27 of the HIP). The voltages depend on the
colour system that is received. The combfilter needs the
subcarrier frequency as sample clock. That is why the
subcarrier is coming out on pin 30 of the HIP.
The truth-table for colour standard as function of SYS1/SYS2 is
described:

colour standard

SYS1

SYS2

PAL-M

LOW

LOW

PAL-B/G/H/D/I

LOW

HIGH

NTSC-M

HIGH

LOW

PAL-N

HIGH

HIGH

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Summary of Contents for MG5.1E

Page 1: ...tored in a retrieval system or transmitted in any form or by any means electronic mechanical photocopying or otherwise without the prior permission of Philips Colour Television Chassis MG5 1E AA Contents Page 1 MG99 Light path 2 2 Introduction 8 3 Overall blockdiagram 9 4 Power supply 11 5 Scan circuits 24 6 Small signal panel 29 7 CRT drive circuit 69 8 Interface panel 72 9 SIDE JACK panel 74 10 ...

Page 2: ...be is projected onto a mirror where it is then reflected onto a viewing screen The Tubes are converged so the light from each tube strikes the same spot on the Fresnel Lens The Fresnel Lens equalizes and concentrates the light to provide equal light uniformity across the screen The Mirror is a first surface mirror type which has the reflective coating on the outside of the mirror To prevent scratc...

Page 3: ...iping The Prismatic formation of the screen allows for nearly 3X light output as compared to a flat screen Caution should be used when working with the screen Damage can easily occur in the form of scratching or by using certain chemical screen cleaners which can strip the black striping from the screen To clean the screen use one drop of dish washing detergent in a small bowl of water approximate...

Page 4: ...f focus voltage Figure 1 3 The Tube produces a highly concentrated light output of color A liquid coolant of Glycol is used to transfer heat from the face of the tube to the surrounding mechanical assembly The C element lens seals the Coupling fluid within the coupler The C element lens and Coupling fluid are part of the light path and contribute to the properties of the optical system ...

Page 5: ...ersonal notes 1 1 MG99 LIGHT PATH PROBLEMS Figure 1 4 CL 96532100_107 eps 021299 Look at the edges of the screen They may be bowed inward PROBLEM BOTTOM CORNERS DARK PROBLEM BOTTOM CORNERS COLORED There is no problem with the set The viewing angle is too high ...

Page 6: ... 1E 1 1 MG99 LIGHT PATH PROBLEMS Personal notes Figure 1 5 CL 96532100_109 eps 151199 Fresnel may be reversed Carefully remove the fresnel and point the grooves toward the viewer PROBLEM BRIGTH AND DARK LINES ON A WHITE FIELD ...

Page 7: ... 7 1 1 MG99 LIGHT PATH PROBLEMS Personal notes Figure 1 6 CL 96532100_110 eps 151199 The Fresnel offset is pointing down The center of the Fresnel should be toward the top of the screen PROBLEM UPPER CORNERS OF THE SCREEN DARK ...

Page 8: ...de Jack panel The systems that can be applied to these inputs are NTSC 3 58 NTSC 4 43 NTSC Play Back PAL 4 43 PAL B G Play Back SECAM and SECAM Play Back The set is equipped with a Frame and Line doubler to produce a horizontal resolution greater than 800 lines The picture display is driven by three seven inch Red Green and Blue tubes The Sound system is driven by a 2 times 20 watt power amplifier...

Page 9: ... RIGHT AUDIO LINE DRIVE FRAME DRIVE HV CIRCUIT FOCUS G2 BLOCK LINE SYNC FRAME SYNC CONVERGENCE PANEL INTENSITY CONTROL CONV R G B FB CONV R G B FB INTERFACE PANEL HV SCAN PANEL CONV YOKES SIDE JACK PANEL MG99 SMALL SIGNAL PANEL LINE SYNC FRAME SYNC 5V STBY 15V STBY 130V 38V 38V 33V 15V 15V 7V7 8V6 5V2 POWER SUPPLY AC SWITCH PANEL SWITCH SPEAKER FOCUS G2 CL 96532100_081 eps 191199 ...

Page 10: ...o a Focus G2 block which provides Focus and G2 voltage to the three CRT S During the Convergence adjustment mode Red Green Blue and Fast Blanking from the Convergence Panel is fed to the Small Signal panel to generate the adjustment grid The Small Signal panel selects video from the Antenna input one of the three Scart connectors or the Side Jack panel The Small Signal panel outputs Red Green and ...

Page 11: ...the output of the Power Factor correction circuit is approximately 329 volts DC in standby and 350 volts DC when the set is turned On The Power Factor correction circuit is turned Off during standby This is a HOT chassis When troubleshooting this or any power supply always use an isolation transformer The Standby Power supply produces a 5 and a 15 volt supplies It also provides operating voltage f...

Page 12: ... charges to 5 7 volts the internal oscillator switches On driving the internal FET switch When the voltage across capacitor 2283 drops below 4 7 volts the IC turns Off This cycle repeats until the 5 volt standby supply turns Shunt Regulator 6205 On The supply voltage for the IC is then supplied to Pin 4 through 7213 Operating voltage to Pin 5 of 7213 the Audio Amplifier power supply and the Power ...

Page 13: ... 2213 1000uF 3239 2K4 2226 22n 6205 SHUT REGULATOR 3240 39K 2210 22uF 7208 5234 2282 1uF RESET 5VSTBY SOURCE 3245 1K 3247 180 1 5 2 4 7 10 9 8 PWM R S 5 7V 5 7V 4 7V INTERNAL SUPPLY R S PFCOUT 3246 2K4 3222 1K5 ON_OFF 3289 10K 3288 10K 2284 10n 7214 5VSTBY 3212 10K 3214 100K 7205 5VSTBY 3215 1K 7206 3241 6K8 1 2 4 5 GND_C 3213 10K 7204 2209 100uF 5214 5211 5233 PFC CONTROL GND_C GND_C GND_C GND_C ...

Page 14: ...dary voltage there is a problem with the outputs of 5202 or with the feedback circuit If 7211 is not pulsing either the IC or capacitor 2283 is defective When the set is turned On transistor 7214 will turn Off turning 7205 On This will turn the Optoisolator 7206 On turning transistor 7204 On switching the operating voltage to the Power Factor Correction circuit It also switches the operating volta...

Page 15: ...t Point B At this point the charge on the capacitor will exceed the AC line voltage reversing the bridge diodes This results in an AC current waveform that is narrow and distorted compared to the AC voltage waveform Non sinusoidal waveforms have a high harmonic content with excessive peaks which results in a low power factor of 0 5 to 0 6 Power Factor is a ratio of real power divided by apparent p...

Page 16: ...s the current sensing resistors to control the On time of 7104 This will maintain the output voltage at 350 volts DC and limit the input current to acceptable levels When 7104 is On current flow through 5109 stores energy in the choke When 7104 turns Off 5109 reverses polarity and charges 2110 Using this type of regulation current is drawn from the AC source throughout the entire cycle keeping the...

Page 17: ...90 2118 1uF 5 9 3127 18K 3128 1K8 2116 2n2 8 13 3124 330K 2115 33 3123 1K8 14 GILBERTS MULTIPLIER 3119 3M3 3126 47K 3125 1K 4 7 6 5 11V 7102 16 3121 33K 2114 1n5 350V DC OUT OUTPUT LOGIC COMPARATOR CURRENT AMPLIFIER 5 11 V 3 5 15 13 5 11V 19V 25V 0 36V MAX 4 3V 0 23V 5 45V 5 45V 5 11V 1 5 5 5V INST LINE VOLTAGE 329V 5006 5007 2105 470p 3105 6R8 5103 2107 1n 5106 2120 220p 3134 470K PFC 2113 100uF ...

Page 18: ... latch When the oscillator goes low the latch is set making output Q High With the other inputs to the AND gate High Pin 20 then goes High turning 7104 On By comparing the input and output voltage the On time of 7104 is increased when the AC voltage is at its low point to maintain the 350 volt DC output When the AC input voltage is at its peak 7104 is On for a shorter period The IPK circuit connec...

Page 19: ...100K 7300 6313 5VSTBY 5VSTBY 3316 1K 3315 15K 7303 6 VCC GND_C GND_C GND_C GND_C GND_C GND_C GND_C GND_C GND_C 5302 3307 33R 6304 3318 150K VCC 4 PFOUT 6315 3345 470R 3346 470R 2350 470P 6305 2312 470P 5304 2313 470uF 5305 2314 22uF 3330 22K 3331 22K 33V 130V 5306 6306 2315 470p 6307 5308 2319 470p 2321 1000uF 14 15 16 17 18 19 12 20 21 22 5307 2316 1000u 2317 1000u 2318 100n 2321 1000u 2322 100n ...

Page 20: ...nergy to maintain 2303 above 9 4 volts the IC then operates in steady state When IC 7302 develops a normal steady state operation the 130 volt supply is sampled by resistors 3324 3323 and 3322 This sample voltage is then sent to Shunt regulator 7303 which drives the feedback optoisolator 7303 The feedback voltage on Pin 14 is then compared with an internal 2 5 volt reference by comparator C Compar...

Page 21: ...0V 130V 130V RTN 130V RTN 1 2 3 4 5 7 6 8 9 10 11 130V 130V RTN 15V 8V6 5V SS GND SSGND 7V7 5V STBY STBY RTN 50 60 HZ 1202 1 2 3 4 5 6 7 8 9 SS GND SS GND 5V2 5V2 5V STBY 8V6 33V ON OFF 15V 1222 1221 AC SW BOARD TO MG99 SMALL SIGNAL PANEL 1210 1203 1276 1212 1205 1220 POWER SUPPLY PANEL TO SCAN HIGH VOLTAGE PANEL TO CONVERGENCE PANEL TO AUDIO AMPLIFIER TO INTERFACE PANEL CL 96532100_052 eps 191199...

Page 22: ...s turned On The 33 15 8 6 and 5 2 volt supplies to the Small Signal panel are developed after the set is turned On The 130 15 8 6 7 7 and 5 volt standby voltages are fed to the Interface panel on connector 1202 The 50 60 Hz signal is a sync signal from the AC power mains which is used to provide sync to the clock circuit on the Small Signal panel 350 volts from the Power Factor Correction circuit ...

Page 23: ...5 2 volt source Transistor 7308 is turned On and Off by the Switching regulator IC 7307 To maintain the 5 2 volt source at the correct voltage the output is sampled and fed to Pin 5 of the IC The voltage on Pin 5 is then compared with an internal reference This drives the Pulse Width Modulator which controls the On time of 7308 The 15 volt source is fed to linear regulator 7305 to produce the 7 7 ...

Page 24: ...04 HPUL_BLNK 3452 4R7 3453 4R7 3454 4R7 3455 4R7 2820 4u7 2452 2u2 3681 2K2 7552 7551 3456 100R 2573 2n2 3591 2K2 3590 100K 3571 2K2 7553 3457 2K2 15V E_W 3458 2K2 3835 3K3 2837 10u 3836 270R 2804 10u 3812 100K 3837 12K 2839 10n 6830 3839 330K 2836 1n 3834 1R 7830 28V HDRV 1509 1 130V A A 3815 0R27 6801 2815 680p 2814 68u 240V 3828 68K 2816 68K 130V 28V 3867 1R 6850 2850 470p 2851 100u 13V 13V 680...

Page 25: ...e Output transistor 7802 is also fed to buffer transistors 7800 and 7804 to produce a Line Sync pulse HPUL and Line feedback pulses to the Small Signal panel H PUL and HFB The output of transistor 7804 also produces a Line Blanking pulse HPUL BLNK Drive for geometry correction from the Small Signal panel on the E W line drives transistors 7553 7551 and 7552 This circuit drives the return side of t...

Page 26: ... fed to the Frame Output IC 7550 Figure 14 This circuit is powered by a 13 volt supply connected to Pin 8 and a 13 volt supply connected to Pin 6 which are supplied by the Line Drive circuit Pin 5 of 7550 provides drive for the the three Frame yokes Frame drive feedback from the return side of the yokes is fed back to Pin 2 of 7550 Frame sync VPUL for the High Voltage shutdown circuit is output on...

Page 27: ...75 100R 3971 100K 3959 1K 3982 7K5 3981 7K5 3940 14K 28V 7907 7908 6906 2927 1u 13V 3969 47K FOCUS EHT 2917 100n 7904 15V 15V 3926 100R 3927 10K 6505 2911 4u7 3514 10K 7502 3513 39K 15V 15V 3512 10K 3511 47K 3508 4K7 BLANKING 15V 15V 15V 15V 7501 7953 3501 10K 6500 6501 3510 470K 2501 470N 3503 120K 6502 6552 6V8 3505 220R VPUL 15V 15V 3503 120K 6501 3506 120K 2503 680p 6502 3507 3K3 3922 1K5 3957...

Page 28: ...by turning the set Off would reset the latch The High Voltage is shut down if it increase beyond the designed safety limits Pin 6 of the High voltage transformer is rectified by 6904 and is fed to Pin 3 of 7902 where it is compared with an internal reference The normal voltage at this Pin is approximately 25 volts DC If the voltage on Pin 3 goes above 28 volts for more than 800 ms the Latch inside...

Page 29: ...ct test patterns display error codes full support of the dealer service tool DST New tools and service features A lot of additional service features are built in the MG5 1E These features can be addressed with a new tool called ComPair Computer Aided Repair This is an interface that can receive the error codes and can send RC5 and RC6 codes To this interface belongs also software and a CD ROM with...

Page 30: ...thms for contrast improvement sharpness noise reduction and better colour behaviour Via a light sensor the influence of the ambient light can be used for optimal contrast brightness control After the TOPIC the YUV signals are fed to the HOP High end Output Processor TDA933X In the HOP is the video control part and geometry integrated The RGB signals from TXT OSD are inserted via the HOP This IC ha...

Page 31: ... 1 Slow I2C bus SCL SDA S speed 100 kHz used for various IC s 2 Fast I2C bus SCL SDA F speed 400 kHz In the OTC there is only one hardware I2C bus The two busses are made by a very fast switch 3 I2C bus for NVM SCL SDA NVM This short I2C bus is used to avoid data corruption in the Non Volatile Memory Microprocessor OTC2 5 On screen display Teletext and Control level 2 5 Txt with integrated teletex...

Page 32: ... is not switched from Standby to on The power supply is a Fixed Frequency Supply with an operating frequency of 40 kHz For the control part the MC44603 is used also known from a lot of other chassis Secondary a DCDC converter MC34063A is used for stabilisation of the 5V2 for various circuitry The Standby command is also fed to the FFS to ensure quick switch off of the power supply In fig 6 3 the b...

Page 33: ...creen of the PC repair time will decrease as well in the SSPas in the LSP part of the set ComPair consists of an electronic interface connected to the computer to make via infra red communications a link to the upmarket TV sets and via a wired I2C a link to Basic TV sets and high end video recorders and a Windows based computer program ComPair is running on a 486 PC with Windows 3 1 onwards Infra ...

Page 34: ...94 95 5 7 I C 0 2 I C SLOW 2 I C FAST 2 I C 1 2 I C 3 2 R B 10R G FADING 100E AFC tuner HIP HSEL OPTIONAL STATUS 3 I O CNTR BUS OUT I O I O CNTR BUS IN I O FRONT DETECT 16 9 DETECT SELECT CL VL RESET AUDIO SOUND EN ABLE CVBS for txt PEAKING PEAKING FILTER TUNER FBX VIDEO SEL AUDIO SELECT HIP HOP MSP 3410 TOPIC ROM 16Mbit 2Mbyte FLASH RAM EPG RAM TXT CONTROL NVM 32 Kbit AO A19 AO A17 AO A8 3054 SAA...

Page 35: ...ia country selection in the installation menu The RGB outputs are available on pins 77 78 79 Fast blanking is realised via pen 80 but TS7017 and TS7018 are added to create a nice fast blanking signal that is needed in the TXT mixed mode These transistors are driven by an extra fast blanking signal from pin 81 In future sets this circuitry will be deleted In the previous chassis there was separate ...

Page 36: ... whether the information in Datastream 2 has changed To do this the set again switches to Semi standby and the Flash Memory is erased and re loaded when the information in Dataflow 2 has changed Every morning at 5 40 the nexTView information will also be re loaded because then information for the previous day can be deleted from the Flash Memory This Channel EPG makes use of Datastream 1only This ...

Page 37: ...digital 88 P0 3 SDA1 SDA Fast I2C bus I O digital 29 D13 Data bit I O digital 89 P0 4 RXD Reserved for switching SCAVEM O active low 30 D9 Data bit I O digital 90 P0 5 TXD IR Led for Service O digital 31 D6 Data bit I O digital 91 P0 6 COR SDA EAROM I O digital 32 D1 Data bit I O digital 92 P0 7 SCL EAROM O digital 33 D14 Data bit I O digital 93 P1 0 T0 Status SCART 4 I active low 34 D8 Data bit I...

Page 38: ...with perfect signal The IF amplifier amplifies too much The video IF signal is fed to pins 2 3 of the PLL controlled IF demodulator The voltage controlled oscillator of the PLL is adjusted via the service menu IF AFC If the alignment is correct then the displayed frequency in the installation menu is the same as the applied frequency from a generator The external coil L5108 connected between pins ...

Page 39: ...l notes signal can be checked To realise quasi split sound the IF signal is fed to the HIP on pin 63 64 via SAW filters 1104 1105 The FM or AM for L norm modulated signal is available on pin 5 and is fed to the audio demodulator MSP3410 see chapter 6 5 ...

Page 40: ... 8 Video recognition 9 AFC crossing 10 Video recognition 13 Frequency found 14 Step 250 kHz in 62 5 kHz sub steps 5 System L L frequencies covered Y Y Y Y Y N N Y Y N N No more video identification Bad AFC crossing detected Y N Y N Y N N N N 2 System L 3 Start search Search command Step 5 MHz in 62 5 kHz sub steps 6 Find frequency 12 Step 62 5 kHz 11 ...

Page 41: ...wo inputs are used 1 Is there video recognition sync detection phi 1 lock in the HIP 2 Is there a carrier AFC crossing PLL lock The complete tuning procedure is illustrated in fig 6 6 but this is all inside the HIP There is also automatic switching for the different videosystems ...

Page 42: ...BE for L and R no subwoofer No Dolby L and R squeeters subwoofer with DBE Virtual Dolby no subwoofer Virtual Dolby subwoofer Dolby prologic no subwoofer corded surround Dolby prologic subwoofer corded surround Future Optional for cordless Dolby The HIP delivers the IF sound FM or the AM low frequent also the external audio signals are fed to the MSP3410D with SEDSP SAA7712H Sound Effects Digital S...

Page 43: ...ed not for surround There is a slow switch on for the SEDSP via C2831 on pin 8 This means that with start on the outputs are muted In the diagram of fig 6 7 three switches are mentioned Via SW1 audio signal is fed to EXT2 VCR scart The EXT2 output is the same as the main sound except when EXT2 is used as an input In that case SW1 is switched and the front end audio signal is fed to EXT2 this to av...

Page 44: ...IP there are two status inputs available pins 15 17 with two voltage levels 4 3 2V2 16 9 5V5 The CVBS status from the third SCART only CVBS in is fed to the OTC because on the HIP there are only two inputs This is also for SCART 3 detection of 4 3 and 16 9 The input signals from front are fed to the HIP and front detection is also fed to the OTC EXT 1 and 2 are both full SCART Thus CVBS and RGB Th...

Page 45: ...f a VCR is connected there is also an automatic correction for macrovision This is active for the external sources and the presets 0 90 99 The Y C switch in the HIP is controlled by the HIP itself no external voltage When a PAL or NTSC signal is received then the Y C from the combfilter will be used and when SECAM is received this will be processed internally The comb filter has to be switched for...

Page 46: ... fig 6 10 PAL SECAM NTSC Four different crystals can be connected to the pins 54 57 without any alignment The crystals are also used as a reference for the synchronisation The start up of the sync is determined by a digital control circuit which is locked to the reference signal of the colour decoder This crystal may only be replaced by the original one If just a crystal is taken the internal capa...

Page 47: ...box is integrated on the small signal panel A new IC is used for the 100Hz conversion the PICNIC In the PICNIC the following functions are present The ADC was FRONTIC The DAC was ECOBENDIC The 100Hz conversion was ECOBENDIC The Panorama mode was PANIC The noise limiter DNR was LIMERIC The contrast improvement was SMARTIC met CPU All these functions are integrated in one IC SAA4978H 160 pins QFP Fu...

Page 48: ...uto DNR The auto DNR works together with the TOPIC who takes care of the sharpness control The effect is Digital Scan featuring To the PICNIC external ICs are connected dependent of the features If MG5 1E has only 100Hz then only one memory IC is used to store one frame For sets with digital scan the PROZONIC IC7608 SAA4990H has been added with two memory ICs IC7606 7607 TMS4C2973 or IC7614 7615 M...

Page 49: ...ROCESSING YIN U V IN LIGHT SENSOR AD3 YOUT U V OUT SANDCASTLE TOPIC 7402 TDA9178 Introduction The TOPIC is an optional IC It is not used in all MG5 1E sets The first introduced sets will not have it The PICNIC delivers the 100Hz YUV signal to the TOPIC IC7402 TDA9178 The TOPIC fig 6 13 can improve various items and has therefore various functions available Luminance transient processor Chrominance...

Page 50: ... is special for NTSC to mask transmission HUE control Green enhancement Green with low saturation is more amplified Blue stretch Colours close to white are changed a little to blue to get a brighter impression 5 Measurement and detection fig 6 14 The noise detector measures the noise in the frame flyback during one video line without videosignal black The TOPIC takes the average of 20 frames This ...

Page 51: ... DRIVE VD POS LINE DRIVE PROT FBCSO FLASH BEAM CURRENT LDP 8V6 HD VD SC 1FH 2FH VFB HFB DYN PHASE CORR HOP In the HOP the videoprocessor and digital deflection processor are integrated The main functions of the HOP are RGB interface for PIP or dual screen Second RGB interface for OSD TXT Control of saturation contrast and brightness Black blue stretch optional because this is already done by the T...

Page 52: ...e main picture On pins 35 38 the RGB and fast blanking from the OTC OSD and TXT are inserted Blue stretch measures the amplitudes of the three RGB signals If one of these colour signals become more than 80 of the nominal value then the amplification of red and green become a little less This to reach a higher colour temperature On pin 43 there is a peak white limiting signal line PWL If the beamcu...

Page 53: ...e manual At switch off set pin 29 of HOP IC becomes high and the deflection will be on top of the picture tube overscan A current of about 7 mA will discharge the picture tube Discharge takes place till the powersupply reaches the POR level Switching the TV to Standby fig 12 3 First the HOP goes to Standby the deflection will be positioned in top of the picture tube overscan The slow stop is expla...

Page 54: ... the second frame three pulses with a current of 20 uA are generated for white drive alignments If possible use here an oscilloscope picture measured at one of the cathodes of the CRT Measure both frames Service Tip With these two measurements the complete characteristic for the RGB amplifiers is adjusted So at start up there is no monitor pulse anymore At start up the HOP measures the pulses whic...

Page 55: ...MG5 1E 6 SMALL SIGNAL PANEL 55 6 9 The HOP High end Output Processor Personal notes Figure 6 19 CL 86532047_029 eps 140798 U FEEDBACK R B G R G B FRAME 1 FRAME 2 ...

Page 56: ...depending on the beam current This is not used at the moment therefore EHT compensation in the service menu is put to zero Service tip Picture breathing is compensated via the east west circuitry EHT varies also dependent of the beam current For widescreen without load this is 31 5 kV and with load 1 5mA 29 5 kV On pin 9 the VFB comes in If the VFB disappears or takes longer then the sandcastle SC...

Page 57: ...rotection is fed back to pin 5 of the HOP If LDP is activated the FLS bit will also be set but the software can detect whether is was a flash or a protection In this case the FLS bit will remain high and the set goes into protection An error code will be generated HFB protection If the HFB is not present then this is detected via the HOP The microprocessor puts the TV into protection and reads a r...

Page 58: ...en red 5Vst by 5V2 6051 tuner 33V 7021 140V FFS 1V 7484 E W HFB HFB 71 HOP 20 DEFLECTION FBSCO LDP 73 VFB 70 Hor defl Vert defl VFB St by EHT info 200V EHT FIL 13V 13V 15V 6341 33V 6758 16V Protection Introduction In fig 17 1 the protection diagram is drawn MG5 1E has only one microprocessor OTC The microprocessor and the NVM are supplied with 3 3V also in Standby mode The Standby command from the...

Page 59: ... device Bus blocked ACKN 5X 5X N Y N N Y N Y N Y Start Free the bus I2C drivers Stop Free bus Device I2C error Slow TEA 6422 Tuner Picnic Prozonic I O video FBX PROT 11 5 50 51 10 77 Send adres data General I2C error Slow Fast 65 66 Fast NVM bus LTP Dolby ITT HIP HOP 21 26 25 15 20 NVM 1 2 ...

Page 60: ...msec a number of registers are refreshed I2C protection becomes active if one of the SDA or SCL lines has short circuit to earth or there is a short circuit between SDA and SCL Also a missing power supply for one of the ICs will generate an I2C error There are different device error codes for as well the slow as the fast I2C bus ...

Page 61: ...V2 LDP Input from Prot counter 0 start 200ms timer Software filter protections on OTC ESD refresh DC PROT BC PROT LDP IF FLS CONT HIGH 8V6 IF DCPROT ACT 5V2 IF DCPROT ACT 76 74 73 68 67 Check Prot at 200ms timer Flash refresh Read HOP status Prot counter 1 Stop timer Goto protection Return Prot C 5 Prot active ...

Page 62: ...f a protection all protection lines to the OTC will be checked 5 times with a repetition time of 200 msec If after 1 sec the protection is still active then the TV set will go into protection blinking LED and the TV is switched to Standby In case of a flash or an ESD there is first an ESD refresh When a flash or an ESD occurs it is possible that some settings of IC s are lost Therefore new initial...

Page 63: ... 6 25 CL 86532047_038 eps 061098 6480 10V 3483 3484 START STOP H DRIVE HOP 3493 6344 LDP 73 5 74 3490 6485 3491 220K 8V6 E W drive E W 3340 6340 6341 FLASH 7341 7351 8V6 8V6 EHT info 33K 1V 3492 3353 8V6 8V6 3350 6350 27V 3352 OTC BC prot ...

Page 64: ...gnal panel via D6350 and TS7351 FBCSO fixed beam current switch off The 140V line on LSP is monitored DC hardware protection error 76 see also fig 6 27 In MD2 GFL there was no separate indication for this This has to be a fast protection otherwise the loudspeakers are damaged or one of the amplifiers can become too hot DC prot is fed to the OTC but also to the main supply FSS for switching off the...

Page 65: ...65 Figure 6 26 CL 86532047_039 eps 140798 3353 7421 2420 Hdefl Vdefl Hdrive 2419 5410 HFB 71 ϕ2 ϕ2 HOP VFB 70 PA 7600 27V 6758 100µ 8V2 Vpos Vneg Flyback gen Thermal prot HOP F R A M E HFB horizontal fly back VFB vertical fly back ...

Page 66: ...tion is activated The output of the op amp is fed back via R3490 D6485 to keep the input high The line drive is stopped because the LDP input is high Also in this situation the FLS bit is set but after the refresh the FLS bit remains high That makes the OTC conclude that there must be a protection This algorithm is also illustrated in flowchart of figure 6 24 Protections via the status register of...

Page 67: ...K ORANGE IN STEAD OF RED Real Hardware protections as DC prot HFB and LDP will always monitor the set situation So also with a non working micro controller these protections are functional The hardware protections VFB and BC prot stay de activated in service mode Stepwise startup explanation Via ComPair the stepwise startup can be realised This is very helpful when a protection is activated State ...

Page 68: ...pwise mode however By stepping up the set can be activated again until state X where protection was activated At state X 1 diagnostic measurements can be performed Mode State Description mode Display leds Note Prot de acti vated 5 TV operates unblanked picture Orange Green 10 Hz None 4 No blackcurrent stabili sation All protections are enabled Orange Green 2 Hz None 3 ICs stay initialised Sound Al...

Page 69: ... the event of a Sweep failure the High on the CRT protection line from the High Voltage Scan panel will go Low Diodes 6011 6012 and 6013 will then be forward biased through resistor 3026 which will turn the blanking transistors On Diodes 6009 6006 and 6010 are forward biased when the Horizontal or Line Sync from the High Voltage Scan panel goes Low During Convergence alignment individual CRT s are...

Page 70: ...drive to the cathode of the CRT Transistor 7803 sets the bias level for the emitter of 7802 CRT drive is fed to transistor 7805 to produce IKG feedback The IKG IKR and IKB feedback is combined on the Interface panel This is part of an automatic CRT bias level loop The CRT drive is powered by the 240 volt source from High Voltage panel The Red and Blu CRT panels have similar circuits ...

Page 71: ...6 3121 680R 12V 7028 3124 330R 3125 100R 7029 3126 1K 1304 8 TO SVM 12V 12V 1304 2 1304 1 15V 130V CL 96532100_095 eps 121199 The Y or Luminance signal from the Small Signal panel if fed to a delay circuit on the Interface Panel before being fed to the SVM panel Figure 7 3 The SVM Scan Velocity Modulation circuit enhances the transitions from light to dark to produce a sharper picture ...

Page 72: ...008 47K 3011 8K2 5V2 47K 3015 SDA TO CONVERGENCE 1375 4 7007 7009 CL 96532100_096 eps 121199 The Clock SCL and Data SDA lines to the Interface and Convergence panels is switched Off in the standby mode Figure 8 1 When the set is turned On the 5 2 volt supply is switched On The 5 2 volt supply turns transistors 7007 and 7006 On to switch the Clock SCL line Transistors 7008 and 7009 are turned On to...

Page 73: ... 9 15V 2001 22uF 2002 100n 3000 10R 6023 2003 10uF 2004 10n 3001 3K3 3002 3K3 12VA 12V 2005 1000uF 6V 1302 11 130V 7V7 7V7 1328 8 1328 6 TO SSP CL 96532100_097 eps 121199 The 15 volt supply from the Power Supply panel is fed to regulator IC 7000 to produce a 12 volt and 6 volt supply for the Interface panel Figure 8 2 The 7 7 volt supply is derived from the 8 6 volt supply This supply along with t...

Page 74: ...d 7001 and filtered by 2007 This circuit is used to signal the Small Signal panel that signal is present on the Side Jack panel The DETECT line will be Low with no signal and High approximately 3 volts when signal is present The Composite or YC signal is routed through the Interface panel to the Small Signal panel Left and Right audio is also routed through the Interface Panel to the Small Signal ...

Page 75: ... 11 10 13 3309 12K 3311 1K 2307 47uF 2313 1 3313 4 7 2309 1000uF 6 5 2 3 2308 47uF 2310 1000uF 3310 12K 3312 12K 2312 47uF 2314 1 3314 4 7 7301 AUDIO OUTPUT VCC R CH AMP L CH AMP 1449 1 R OUT 1449 5 L OUT 3208 47K 2208 22 7202 2203 01 2201 1uF 6203 6202 3419 2 7K 2415 10uF 6408 8 2V 2416 1 3418 470 12V 8V SOURCE 1401 3 R CH IN 1401 5 L CH IN 1401 2 MUTE 43 43V 7203 7208 7204 7207 2311 47uF 8V 3205...

Page 76: ...olt supply on Pin 9 The Amplifier is a 2 times 20 watt amplifier Transistors 7203 7204 7207 and 7208 are muting transistors These transistors turn On when a Low zero volts is placed on their gates When a High from the Small Signal panel is placed on the base of transistor 7202 the four muting transistors are turned On to Mute the audio When the set is turned On the Muting transistors are turned On...

Page 77: ...eakers are placed in series An external amplifier is connected to the Center channel amplifier terminal to drive the internal speakers If an external Sound system is used by the customer the TV speakers would be used as the Center channel The Audio Amplifier panel has its own Power supply Figure 10 3 The Power Supply panel supplie 350 volts to the switching FET 7403 through transformer 5401 Operat...

Page 78: ... 14 6402 1201 3A 2411 10 12 6404 5404 2414 2417 2413 43V SOURCE 2412 12V SOURCE 2410 VCC UNDER VOLTAGE LOCKOUT 3414 3415 6405 6406 REF 2401 6401 3421 6 7 2404 2502 3 7 5V 8 5 REF REG 4 7 10uF 47uF 3413 2K 68 470 100 390 470 470 470pF 2 21K 1000pF 220K 2408 1000pF 2425 100pF 3410 3 01K 2407 4700pF 2406 01uF 1 4700uF 3422 1 680uF 100uF 1400 1 1400 2 POWER ON OPERATING VOLTAGE CL 96532100_101 eps 121...

Page 79: ...L 96532100_098 191199 To troubleshoot the power supply first check the input signal on connector 1401 Pins 3 and 5 Figure 10 4 Then check the audio outputs on 1449 Pins 1 and 5 Check the Mute line on 1401 Pi 2 to ensure that it is Low Check the 350 volt operating voltage on Pin 1 of connector 1403 This voltage is referenced to HOT ground Use Pin 3 to ground the voltmeter when making this check Che...

Page 80: ...Yokes are not linear devices Figure 11 1 Therefore a convergence circuit is necessary to align the beams of all three tubes over the entire screen The Convergence panel is powered by a 38 volt a 38 volt a 15 volt and a 15 volt supply from the Power Supply panel A Llne Sync H PUL and a Frame Sync V PUL from the Scan High Voltage panel keeps the Convergence Correction waveforms synchronized to the d...

Page 81: ... middle range when the dc voltage at TP3 is 1 5 volts When the set is turned On the microprocessor on the Small Signal panel reads the data stored in IC101 on the Convergence panel via the I2C bus This information contains the x y coordinates for the 35 alignment points of each color visible on the screen during convergence set up along with other register settings used by the csp The csp uses fou...

Page 82: ...ef Vref Vref Vref Vref IC102 5V IC100 PLL FILTER TP3 PLL SET UP 5V 12V SF100 Q100 2 8 4 5 7 8 6 1 3 21 22 24 2 23 28 42 63 CLK HPHL 5 4 8 12V 12V 12V 8 12V 4 12V 8 12V 4 5 5 6 11 14 5 5 6 11 14 5 5 6 11 14 5VA 5 HPUL VPUL Q101 Q100 61 55 8 35V 35V 7012 AMP AMP 5 10 4 8 12 17 1 2 14 6 11 AMP 9 18 15 RED VERTICAL CONVERGENCE YOKE RED HORIZONTAL CONVERGENCE YOKE AMP AMP 4 8 12 17 35V 1 2 15 14 AMP 18...

Page 83: ...19 6018 3107 150R 3108 150R 1377 2 LRB FB 1364 2 LRB CL 96532100_105 eps 151199 During the Convergence adjustment mode the Blue Green and Red cross hatch pattern signals are fed to the Interface panel on connector 1370 Pins 4 6 and 8 Figure 11 4 Fast blanking LRB is fed to the panel on connector 1370 Pin 2 An intensity control from the Convergence microprocessor is fed to transistor 7005 on the In...

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