Circuit Diagrams and PWB Layouts
53
LC7.5E LA
7.
SSB: Trident WX68
Trident - WX68
NC
RES
RES
RES
WS U12 Use ALE to latch Address Use Falling Edges of WR#&RD# to latch Address(*)
SD0 V12 Use Rising Edge of WR# to latch data(*) Use Falling Edge of WR# to latch dat a
SCK Y11 I2C Slave Address=0x7E/7F(*) I2C Slave Address=0x7C/7D
Pin Name Pin No
1(HIGH)
0(LOW)
RES
FOR ITV ONLY
NC
NC
NC
NC
NC
NC
NC
NC
NC
T
O
FPGA /
T
O
L
V
DS CONNECT
O
R
RES
RES
RES
RES
0R
3C36 F3
3C37 G3
3C39 C1
3C40 C2
3C41 C2
3C42 D2
3C43 D2
3C44 D2
4C07 C8
4C08 E10
5C06 A1
5C07 A1
5C08 B1
7C01-1 A7
7C01-3 A3
7C02 D10
7C03-1 E2
7C03-2 F2
7C03-3 F2
7C03-4 G2
7C03-5 G4
7C03-6 G5
7C04 D10
FC01 A2
FC02 A2
FC03 B2
IC01 D10
IC02 D11
IC07 A3
3C03-1 C6
3C03-2 C6
3C03-3 C6
3C03-4 C6
3C04-1 B6
3C04-2 B6
3C04-3 B6
3C04-4 B6
3C05-1 B6
3C05-2 B6
3C05-3 B6
3C05-4 B6
3C06-1 C6
3C06-2 B6
3C06-3 B6
3C06-4 B6
3C07 D9
3C08 C6
3C09 C6
3C10 C6
3C19 C8
3C20 C9
3C22 D10
3C23 D11
3C24 D11
3C25 D9
3C29 E2
3C30 E3
3C31 F2
3C32 F2
3C33 F2
3C34 F3
7C01-3
A
B
C
D
E
F
G
A
B
C
D
E
F
G
1C24 A6
2C01 A6
2C02 A6
2C03 A8
2C04 B8
2C05 B8
2C06 B8
2C07 B8
2C08 B8
2C09 B8
2C10 B8
2C11 B8
2C12 B8
2C13 B8
2C14 B8
1
2
3
4
5
6
7
8
9
10
11
1
2
3
4
5
6
7
8
9
10
11
IC01
2C15 B8
2C17 C8
2C18 C8
2C19 C8
2C20 D8
2C21 D8
2C22 A1
2C23 A1
2C24 B2
2C25 B2
2C26 B1
2C27 B1
2C28 C1
2C29 C1
2C30 D9
2C33 F3
2C73 D9
2C74 D11
2C81 B6
2C82 B6
3C01 A6
3C02 A7
IC02
FC03
FC01
FC02
2C30
1
00n
2C82
2n7
2C81
2n7
74LCX14T
13
71
4
12
11
71
4
10
7C03-6
7C03-5
74LCX14T
+5V_SW
+5V_SW
3C29
4K7
4K7
3C32
+3V3_SW
2C33
100n
22R
3C31
3C33
22R
22R
3C37
22R
22R
3C36
3C34
8
3C30
22R
74LCX14T
7C03-4
9
71
4
74LCX14T
7C03-3
5
71
4
6
3
71
4
4
14
2
74LCX14T
7C03-2
74LCX14T
7C03-1
1
7
FPGA_BL_DIMMING
100R
3C07
+3V3_SW
+3V3_SW
+3V3_SW
3C44
4K7
3C43
4K7
3C41
4K7
4K7
3C40
3C42
4K7
3C39
4K7
3C25
10K
2C74
22u
3C24
100R
+3V3_SW
4C08
10u
2C73
BC847BW
7C04
BC847BW
7C02
3C23
220R
+3V3_SW
3C22
4K7
+3V3_SW
+3V3_SW
2C26 100n
2C25 100n
2C24
100n
2C28 100n
2C22 100n
2C27
6.3V
10u
2C29
6.3V
10u
6
.3V
10u
2C23
5C08
220R
220R
5C07
5C06
220R
2C19
100n
2C18
100n
2C17
100n
2C15
100n
2C14
2C13
100n
100n
2C12
100n
2C11
100n
2C10
100n
2C09
100n
2C08
100n
2C07
100n
100n
2C06
2C04
2C05
100n
2C03
100n
+5V_STANDBY
100n
3C20
2C20
100n
1K0
2C21
100n
4C07
470R
3C19
3C10
100R
3C09
3C08
4
5
100R
6
100R
3C03-4
3C03-3
100R
3
100R
3C03-2 2
7
3C03-1 1
8
1
8
100R
2
7
100R
3C06-1
3
6
3C06-2
100R
100R
3C06-3
100R
3C06-4 4
5
3C05-3
100R
3
6
100R
3C05-4 4
5
3C05-2 2
7
1
8
100R
100R
3C05-1
3C04-4
100R
4
5
100R
3C04-3 3
6
3C04-2 2
7
1
8
100R
100R
3C04-1
2C01
18p
2C02
18p
24M0
1C24
1M0
3C01
Y6
Y_G3
33R
3C02
H17
SDA
F17
TESTMODE
F16
V5SF
J19
WR_
W1
XTALI
Y1
XTALO
V6
Y_G1
W6
Y_G2
R4
PLF2
Y8
PR_R1
W8
PR_R2
V8
PR_R3
G17
PWM0
J20
RD_
F18
RESET
H18
SCL
G18
INTN
U2
MLF1
W9
PB_B1
Y9
PB_B2
Y10
PB_B3
W10
PC_B
Y7
PC_G
U8
PC_R
J17
CPU_CS
Y4
CVBS1
W2
CVBS_OUT1
V2
CVBS_OUT2
FB1
Y5
U4
FB2
V4
FS1
W4
FS2
M20
ADDR4
M19
ADDR5
M18
ADDR6
M17
ADDR7
AIN_H
V10
U10
AIN_V
J18
ALE
V9
C
K17
AD4
K18
AD5
K19
AD6
K20
AD7
ADDR0
N17
N18
ADDR1
N19
ADDR2
N20
ADDR3
AD0
L17
L18
AD1
L19
AD2
L20
AD3
SVP WX68
7C01-1
M3
TMDS_GND2
N3
TMDS_GND3
P3
TMDS_GND4
R1
TMDS_GND5
U12
WS
IC07
A18
TD1P
G19
TD2M
F20
TD2P
B19
TE1M
A19
TE1P
H19
TE2M
G20
TE2P
L3
TMDS_GND1
A16
TC1P
E19
TC2M
D20
TC2P
B17
TCLK1M
A17
TCLK1P
F19
TCLK2M
E20
TCLK2P
B18
TD1M
TA1P
B20
TA2M
A20
TA2P
B15
TB1M
A15
TB1P
D19
TB2M
C20
TB2P
B16
TC1M
RX2-
L1
RXC+
L2
RXC-
V11
SCDT
Y11
SCK
V12
SD0
W12
SPDIF
B14
TA1M
A14
PVCC
T10
PWR5V
R5
REGVCC
M1
RX0+
M2
RX0-
N1
RX1+
N2
RX1-
P1
RX2+
P2
AUDIOCLK
M4
AVCC1
N4
AVCC2
N5
AVCC3
P4
AVCC4
P5
DGND
T11
DSCL
U11
DSDA
L4
SVP WX68
M5
ANTSTO
W11
WX_PAVDD1
WX_PAVDD2
PC_VGA_H
PC_VGA_V
VGA_H
VGA_V
BL_ADJUST
IBO_G_IN
IBO_B_IN
WX_PVCC
WX_AVCC
WX_REGVCC
SC1_CVBS_IN
HD_PR_IN
SC1_R_IN
SC2_Y_CVBS_IN
IBO_CVBS_IN
SC2_C_IN
IBO_R_IN
HD_Y_IN
SC1_G_IN
FRONT_CVBS_SVHS_Y_IN
SVHS_C_IN
HD_PB_IN
SC1_B_IN
A(0:7)
AD(0:7)
IIC_SCL
IIC_SDA
CS
RST_H
CVBS_RF
A(2)
A(3)
A(4)
A(5)
A(6)
A(7)
AD(6)
AD(7)
A(0)
A(1)
AD(0)
AD(1)
AD(2)
AD(3)
AD(4)
AD(5)
SC1_RF_OUT_CVBS
SC2_CVBS_MON_OUT
SC1_FBL_IN
INT
RD
WR
WX_PVCC
WX_REGVCC
TxFPGAe_4p
TxFPGAe_4n
TxFPGAo_4n
TxFPGAo_4p
PC_VGA_H
PC_VGA_V
ALE_EMU
TxFPGAe_2p
TxFPGAe_3n
TxFPGAe_3p
TxFPGAe_CLKn
TxFPGAe_CLKp
WX_AVCC
TxFPGAe_0p
TxFPGAe_1n
TxFPGAe_1p
TxFPGAe_2n
TxFPGAo_3n
TxFPGAo_3p
TxFPGAo_CLKn
TxFPGAo_CLKp
TxFPGAe_0n
TxFPGAo_0n
TxFPGAo_0p
TxFPGAo_1n
TxFPGAo_1p
TxFPGAo_2n
TxFPGAo_2p
B05A
B05A
H_17370_010.eps
010804
3139 123 6273.1