Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.
9.7
Synchronisation
9.7.1
Introduction
Through the chassis, the synchronisation is complicated
because the PDP display needs another number of pixel per
line (852) and lines per frame (480). Therefore, there is a
different sync flow for 1fH, 2fH, or 3fH inputs.
Figure 9-11 Sync and clock flow
9.7.2
Sync Flow 1fH Inputs
1fH Sync Signals
•
At the 1fH side, the HIP is detecting the incoming video
signal and provides a H_A / V_A (Horizontal / Vertical
Acquisition sync) pulse. This is the sync input for the FBX.
•
The flywheel of the PICNIC gives a 1fH sync H_REF_EXT
to the EBILD, together with the V_A pulse.
•
These are switched in the EBILD and sent to Eagle
(H_REF and V_REF).
•
The Eagle delivers new sync pulses HD_E and VD_E
converted to the new line and frame sequence of the PDP
3fH. The PDP displays in 50 or 60 Hz, 480 lines per field
and 852 samples per line.
•
The EBILD delivers sync pulses to the OTC for OSD and
TXT (VD-OTC and HD3-OTC). Note that the OSD has a
field freq of 50/60Hz.
1fH Clock Signals
•
The PICNIC delivers a 32 MHz clock (CLK32P) to the
EBILD synchronised with H pulses.
•
The EBILD switches this signals to the Eagle (CLK32I).
•
The Eagle delivers a clock signal for the FALCONIC and
the field memories.
•
The Eagle delivers a 64 MHz clock to the EBILD (CLK64).
9.7.3
Sync Flow 2fH Inputs
2fH Sync Signals
•
The input signals do not come via the HIP and PICNIC, but
via the AD9883A. This AD converter delivers H and V sync
signals to the EBILD (H-2FH-AD-OUT and V-2FH-AD-
OUT).
•
These inputs are used for standard detection and H and V
shift.
•
The EBILD divides the pulses by two, and switches the H
and V syncs to the Eagle (H_ref and V_ref).
•
The Eagle delivers new sync pulses HD_E and VD_E
converted to the new line and frame sequence of the PDP
3fH. The PDP displays in 50 or 60 Hz, 480 lines per field
and 852 samples per line.
•
The EBILD delivers sync pulses to the OTC for OSD and
TXT (VD_OTC and HD3_OTC). Note that the OSD has a
field freq of 50/60Hz.
•
The PICNIC receives V_ref pulses as reference; it is free
running for horizontal sync.
2fH Clock Signals
•
The AD9883A gives his sample clock (CLK-2FH) to the
EBILD, this clock is synchronised with the incoming H
pulses.
•
The EBILD switches this pulse to the Eagle (CLK32I).
CL 36532075_048.eps
101103
Falconic
Eagle
FM
(lower lines)
FM
(upper lines)
FM
FM
FM
HA50
VA
HD_E
EPLD
EBIL D
Sync control
YUV
to
RGB
PDP
A/D
OTC
HD
3
-OT
C
VD
-O
TC
CLK64
HREF
jmp
Standard
Detection
H
V
HREF
VREF
jmp
VREF
LVDS
Connector
Sync and Clock Flow
Video
SW
SH95
TDA8601
EPROM
VD_E
CLK-2FH
V-2FH-AD-OUT
H-2FH-AD-OUT
H-SYNC-VGA (DVI)
V-SYNC-VGA (DVI)
Matrix
RGB
YUV
YUV
SYNCDET
Clock
switch
CLK-
O
S
D
XTAL
CL
Kp
REFCLK
CL
K
p
1/3
DS90C385
LVDS Transmitter
CLK-VID
RGBBL-OSD
UV demux
Contrast
saturation
brighness
OSD
insertion
Contrast
Reserve
R0..7 G0..7 B0..7
HS- VS- CLK- DE-OUT
VA50
Y Pb Pr
C L
32 MC
jmp
CLK32P
CLK32I
H,V
shift
H/V
SYNC
HREF_EXT
VA
clock
Href_ext
Picnic
A/D
SOG (Y)
AD9883A
