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EN 58
3139 785 30981
8.
Circuit- and IC Description
Reset concept Digital board
The rest circuitry [7595] takes cares that the different devices
on the digital board are boot-up in the correct order. At power
on the reset circuitry provides the following resets (delay
τ
1):
•
SYS_RST# to the Domino chip [7101] and Flash Memory
[7294]
The Domino chip then generates other reset signals (delay
τ
2) via its GPIOs:
•
VID_RST# to reset the VIP [7401]
•
LINK_RST# to reset the IEEE1394 DV PHY IC [7301]
•
IDE_RST# to reset Basic Engine
8.3.8. I/O
Connector
Audio IO Connector (item 136)
The Audio In/Out (AIO) connector is used to interchange
digital audio signals between the Analog and Digital board
Video IO Connector (item 1521)
The Video In/Out (VIO) Connector is used to interchange
analogue video signals between the Analog and Digital board
D
M
N-
860
2
B
asic
E
ngine
VAD
8041
D
elay
t
3
VIP
(
TVP
5146)
D
elay
t
2
PDI
1394
P2
5
BD
D
elay
t
2
F
L
AS
H M
E
M
ORY
POWER
ON
RESET
& L
OW
VO
L
TA
G
E
DETECTION
NCP
303L
SN
30
IC
7595
H
OSTRST
5
V
S
upply
FRONT
M
ICROPROCESSOR
RST
n
SYSRST
#
L
N
K
_RST
#
VID_RST
#
IDE_RST
#
Figure 8-5 DOMINO_RESET
8.3.5. Power Supply
The Digital board is not powered in standby mode. The
control signal STBY on the analog board will enable the PSU
and power the digital board.
•
STBY = Low: the digital board is in powered down
standby
mode
•
STBY = High: the power supply to the digital board is
enabled.
The 3V3, +5V and +12V come from the PSU, while the
following voltages are generated in the digital board:
•
1.8V core voltage is generated on the board by a 2A
switching step down voltage regulator [7521]
•
2.5V supply for the SDRAM is generated by an ultra fast
low dropout linear regulator [7515]
•
1.25V DDR termination supply is generated by regulator
[7201]
8.3.6. Memory
•
FLASH IC7294: this memory contains the boot
parameters and application
fi
rmware
8.3.7. Reset