
EN 54
3139 785 30981
8.
Circuit- and IC Description
The sound processing is always done in stereo (that means
separate left- and right- channel).
Record
path
The complete selection of audio signal for recording is done
by a HEF4052 [7301], which is a dual four-to-one mulitplexer.
The input lines for the selector [7301] are coming either from
MSP [7500] (AFEL/AFER) or cinch rear-in Ext 1 ( AIN1L/
AIN1R) or cinch rear-in Ext 2 (AIN2L/AIN2R) or the cinch
front-in (AINFl/AINFR). The [7301] controlled via RSA1- and
RSA2- signals coming from the MSP [7500]. The MSP acts as
a port expander of the slave
μ
P. The Op-Amp on the output
[7301] is necessary for performance reasons and acts also as
a driver. The selected signals ALADC and ARADC are directly
fed to the Audio-ADC.
As there is also a
fi
fth input (DV-in), the corresponding audio
signals (ALDAC/ARDAC) from the Digital board are routed via
the MSP [7500] and output as AFEL/AFER to selector [7301]
Line-out
path
See chapter
8.2.6.
Digital audio-out path
In addition to the analog output the set is also equipped
with a digital audio output via cinch plug [1701]. The signal
is generated on the digital board and routed via the audio
interface cable and connector [1600] to the Analog board.
Here the DAOUT-line
fi
rst passes a 6-fold inverter [7700]
being used as a driver and for performance reasons (noise
reduction, jitter,etc). Afterwards a transformer [5700] is
necessary to achieve the correct level and also to have a
fl
oating output with isolated group before the signal is fed
via [3712 & 3713] to cinch plug [1701]. The capacitor [2706]
performs an AC-coupling between connector- and set-ground.
8.2.6. Audio ADC/DAC
The conversion of analog audio signals from the record-
selector [7301] in the I/O (ALADC- & ARADC-) is done via
UDA1361ts [7606]. This IC can process input signals up
to 2Vrms by using external resistors [3614,3615] in series
to the input pins. All required clock signals are generated
on the digital board and only the audio data ( A_DAT line
A_DAT-line) are routed from the Analog to Digital board for
further processing. The transformation of digital audio back
into analog domain is done by UDA1334BTS [7606] . All
necessary clock signals are coming from the digital board
and digital audio data (D_DATA0-line) are converted into
analog signals, which are are available at pins 14 and 16
of [7606]. Low –pass
fi
lter consisting of [2626,2627,2628,2
629,3630,3629,3631,3632] to increase signal performance
(noise,distortions), is passed. Then both signals (ALDAC &
ARDAC) are directly routed to the rear cinch output. The DAC
has also a mute function, pin 14 and pin 19 serves as a digital
silence mute, which is asserted when the digital audio signal
is silent.
The signals from the audio DAC part (ARDAC/ALDAC)
are directly routed to both cinch rear outputs, which are
connected in parallel. To avoid plops and any other audible
noise on the output there is a mute-stage implemented
[7302,7303] for each channel. The activation is done via
AKILL-line, which is a combination of the KILL, D_KILL from
digitalboard, AMUTE, BMUTE (digital silence mute) from
DAC-part and IPFAIL from the Power supply unit.